A Single Parameter Voltage Adjustable Immittance Topology for Integer- and Fractional-Order Design Using Modular Active CMOS Devices

dc.contributor.authorŠotner, Romancs
dc.contributor.authorJeřábek, Jancs
dc.contributor.authorPolák, Ladislavcs
dc.contributor.authorProkop, Romancs
dc.contributor.authorJaikla, Winaics
dc.coverage.issue5cs
dc.coverage.volume9cs
dc.date.accessioned2021-06-30T10:53:44Z
dc.date.available2021-06-30T10:53:44Z
dc.date.issued2021-05-17cs
dc.description.abstractA simple single parameter adjustable immittance concept designed with modular active devices, fabricated in I3T 25 0.35 um 3.3 V CMOS process of ON Semiconductor, is introduced. The proposed devices employ an integer-order capacitor and specifically designed fractional-order capacitors (sometimes called constant phase elements). The proposed active topology consists of two simple active elements, namely a linearly voltage adjustable operational transconductance amplifier and a voltage differencing unity gain voltage follower/buffer, and only two passive elements, i.e. redundancy is minimized. The designed topology offers generation of an adjustable immittance having both the capacitive and inductive character. The importance of the order as well as the value of the pseudo-capacitance for design and analyzes are shown, including all important parasitic features for estimation of expected operational bandwidth which have to be considered in the design. The operational bandwidth is determined by high values of approximants of fractional-order capacities (225, 56 and 8.8 uF /sec^1- a , where represents the order equal to 0.25, 0.5 and 0.75, respectively). These parameters result into ranges between tens of Hz and units-tens of kHz. The adjustability of the transconductance from 70 to 700 S by the driving voltage between 0.05 and 0.5 V offers approximately one decade change of equivalent capacitance and inductance. Laboratory-based experiments done with a fabricated prototype confirmed the theoretical presumptions.en
dc.formattextcs
dc.format.extent73713-73727cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationIEEE Access. 2021, vol. 9, issue 5, p. 73713-73727.en
dc.identifier.doi10.1109/ACCESS.2021.3081140cs
dc.identifier.issn2169-3536cs
dc.identifier.other171916cs
dc.identifier.urihttp://hdl.handle.net/11012/200358
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofIEEE Accesscs
dc.relation.urihttps://ieeexplore.ieee.org/document/9432958cs
dc.rightsCreative Commons Attribution 4.0 Internationalcs
dc.rights.accessopenAccesscs
dc.rights.sherpahttp://www.sherpa.ac.uk/romeo/issn/2169-3536/cs
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/cs
dc.subjectCapacitance multiplieren
dc.subjectCMOSen
dc.subjectconstant phase elementen
dc.subjectfractional-orderen
dc.subjectimmittance generationen
dc.subjectlinear voltage adjustmenten
dc.subjectsynthetic inductanceen
dc.titleA Single Parameter Voltage Adjustable Immittance Topology for Integer- and Fractional-Order Design Using Modular Active CMOS Devicesen
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
sync.item.dbidVAV-171916en
sync.item.dbtypeVAVen
sync.item.insts2021.07.29 12:53:03en
sync.item.modts2021.07.29 12:14:00en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektronikycs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav mikroelektronikycs
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