Current–Mode Fractional–Order Electronically Controllable Integrator Design
| dc.contributor.author | Langhammer, Lukáš | cs |
| dc.contributor.author | Šotner, Roman | cs |
| dc.contributor.author | Dvořák, Jan | cs |
| dc.contributor.author | Sládok, Ondřej | cs |
| dc.contributor.author | Jeřábek, Jan | cs |
| dc.contributor.author | Bertsias, Panagiotis | cs |
| dc.date.accessioned | 2021-03-08T15:54:39Z | |
| dc.date.available | 2021-03-08T15:54:39Z | |
| dc.date.issued | 2020-11-25 | cs |
| dc.description.abstract | This contribution presents a design of a current–mode fractional–order electronically controllable integrator which can be used as a building block for a design of fractional–order (FO) circuits. The design is based on a 2nd–order Follow–the–Leader–Feedback topology which is suitably approximated to operate as an integrator of a fractional order. The topology is based on Operational Transconductance Amplifiers (OTAs), Adjustable Current Amplifiers (ACAs) and Current Follower (CF). The proposed structure offers the ability of the electronic control of its fractional order and also the electronic control of the frequency band. Simulations in Cadence IC6 (spectre) and more importantly experimental measurements were carried out to support the proposal. If wider bandwidth where the approximation is valid is required, a higher order structure must be used as also shown in this paper by utilization of a 4th–order FLF topology. | en |
| dc.format | text | cs |
| dc.format.extent | 1-4 | cs |
| dc.format.mimetype | application/pdf | cs |
| dc.identifier.citation | Proceedings of the 2020 IEEE International Conference on Electronics Circuits and Systems (ICECS). 2020, p. 1-4. | en |
| dc.identifier.doi | 10.1109/ICECS49266.2020.9294923 | cs |
| dc.identifier.isbn | 978-1-7281-6044-3 | cs |
| dc.identifier.other | 165332 | cs |
| dc.identifier.uri | http://hdl.handle.net/11012/196447 | |
| dc.language.iso | en | cs |
| dc.publisher | IEEE | cs |
| dc.relation.ispartof | Proceedings of the 2020 IEEE International Conference on Electronics Circuits and Systems (ICECS) | cs |
| dc.relation.uri | https://ieeexplore.ieee.org/document/9294923 | cs |
| dc.rights | (C) IEEE | cs |
| dc.rights.access | openAccess | cs |
| dc.subject | current mode | en |
| dc.subject | electronic control | en |
| dc.subject | fractional order | en |
| dc.subject | fractional–order emulator | en |
| dc.subject | integrator | en |
| dc.title | Current–Mode Fractional–Order Electronically Controllable Integrator Design | en |
| dc.type.driver | conferenceObject | en |
| dc.type.status | Peer-reviewed | en |
| dc.type.version | acceptedVersion | en |
| sync.item.dbid | VAV-165332 | en |
| sync.item.dbtype | VAV | en |
| sync.item.insts | 2021.03.08 16:54:39 | en |
| sync.item.modts | 2021.03.08 16:14:17 | en |
| thesis.grantor | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikací | cs |
| thesis.grantor | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektroniky | cs |
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