Comparative Study of Op-Amp-based Integrators Suitable for Fractional-Order Controller Design

dc.contributor.authorHerencsár, Norbertcs
dc.contributor.authorKartci, Aslihancs
dc.contributor.authorYildiz, Hacer A.cs
dc.contributor.authorŠotner, Romancs
dc.contributor.authorDvořák, Jancs
dc.contributor.authorKubánek, Davidcs
dc.contributor.authorJeřábek, Jancs
dc.contributor.authorKoton, Jaroslavcs
dc.date.issued2019-07-01cs
dc.description.abstractIn this paper, a fractional-order capacitor (FOC) of an order = 0.89 (i.e. constant phase angle –80.1 degree) was emulated via Valsa RC network with five branches. The network component values were optimized using modified least squares quadratic method in a wide frequency range of 100 mHz–1 kHz (i.e. 4 decades) and maximum relative phase error 0.78% was obtained. The design specification corresponds to a speed control system of an armature controlled DC motor, which is often used in control theory. Overall performance evaluation shows the product of evaluated key features (e.g. phase angle deviation and absolute values of relative phase, impedance, and pseudocapacitance errors) for the optimized FOC is 13.3% less than the one obtained via Valsa approximation. The behavior of Op-Amp-based non-inverting configurations of analogue fractional-order integral operator s– employing the optimized FOC, where 0 < < 1, is compared. The behavior of studied integrator circuits is confirmed by SPICE simulations using the readily available Texas Instruments TL072 low-noise Op-Amp macromodel, which is commonly used in electronics.en
dc.formattextcs
dc.format.extent740-743cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationProceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary. 2019, p. 740-743.en
dc.identifier.doi10.1109/TSP.2019.8768843cs
dc.identifier.isbn978-1-7281-1864-2cs
dc.identifier.orcid0000-0002-9504-2275cs
dc.identifier.orcid0000-0001-5690-7574cs
dc.identifier.orcid0000-0002-2430-1815cs
dc.identifier.orcid0009-0004-3915-9825cs
dc.identifier.orcid0000-0002-0346-0761cs
dc.identifier.orcid0000-0001-9487-5024cs
dc.identifier.orcid0000-0003-4263-5875cs
dc.identifier.other157434cs
dc.identifier.researcheridA-6539-2009cs
dc.identifier.researcheridE-2150-2018cs
dc.identifier.researcheridG-4209-2017cs
dc.identifier.researcheridP-7120-2017cs
dc.identifier.researcheridE-3392-2018cs
dc.identifier.researcheridE-3929-2018cs
dc.identifier.researcheridE-1241-2018cs
dc.identifier.scopus23012051100cs
dc.identifier.scopus55576535400cs
dc.identifier.scopus21834721500cs
dc.identifier.scopus57188853049cs
dc.identifier.scopus8659506800cs
dc.identifier.scopus23011945600cs
dc.identifier.scopus15061338400cs
dc.identifier.urihttp://hdl.handle.net/11012/180513
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofProceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungarycs
dc.relation.urihttps://ieeexplore.ieee.org/document/8768843cs
dc.rights(C) IEEEcs
dc.rights.accessopenAccesscs
dc.subjectDC motoren
dc.subjectfractional calculusen
dc.subjectfractional-order capacitoren
dc.subjectfractional-order controlleren
dc.subjectfractional-order integratoren
dc.subjectOp-Ampen
dc.subjectValsa RC networken
dc.titleComparative Study of Op-Amp-based Integrators Suitable for Fractional-Order Controller Designen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionacceptedVersionen
sync.item.dbidVAV-157434en
sync.item.dbtypeVAVen
sync.item.insts2025.02.03 15:41:29en
sync.item.modts2025.01.17 16:55:49en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektronikycs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
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