Design of Fractional-Order Integrator Controlled by Single Voltage Gain

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dc.contributor.authorŠotner, Romancs
dc.contributor.authorPetržela, Jiřícs
dc.contributor.authorJeřábek, Jancs
dc.contributor.authorHerencsár, Norbertcs
dc.contributor.authorAndriukaitis, Dariuscs
dc.date.accessioned2019-07-30T06:55:34Z
dc.date.available2019-07-30T06:55:34Z
dc.date.issued2019-07-01cs
dc.description.abstractThis work presents analyses of interaction of fractional- and integer-order transfer functions when their responses are added together by simple linear operation of sum. The mathematical background is very complex but practical consequences may be very useful for further design of electronically reconfigurable circuits including modification of shape of the resulting magnitude and phase responses. Described approach allows control of constant phase shift in limited operational bandwidth by single parameter that is documented by PSpice simulations with models of common of-the-shelf active elements.en
dc.formattextcs
dc.format.extent360-364cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationProceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary. 2019, p. 360-364.en
dc.identifier.doi10.1109/TSP.2019.8768814cs
dc.identifier.isbn978-1-7281-1864-2cs
dc.identifier.other157693cs
dc.identifier.urihttp://hdl.handle.net/11012/180512
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofProceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungarycs
dc.relation.urihttps://ieeexplore.ieee.org/document/8768814cs
dc.rights(C) IEEEcs
dc.rights.accessopenAccesscs
dc.subjectConstant phase elementen
dc.subjectfractional-orderen
dc.subjectinteger-orderen
dc.subjectlinear operationen
dc.subjectphase shift controlen
dc.subjecttransfer response.en
dc.titleDesign of Fractional-Order Integrator Controlled by Single Voltage Gainen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionacceptedVersionen
sync.item.dbidVAV-157693en
sync.item.dbtypeVAVen
sync.item.insts2020.03.31 09:57:00en
sync.item.modts2020.03.31 07:46:05en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektronikycs
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