A 0.3-V 98-dB Rail-to-Rail OTA in 0.18 um CMOS

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dc.contributor.authorKhateb, Fabiancs
dc.contributor.authorKulej, Tomaszcs
dc.coverage.issue1, IF: 3.745cs
dc.coverage.volume8cs
dc.date.accessioned2020-08-04T11:00:35Z
dc.date.available2020-08-04T11:00:35Z
dc.date.issued2020-02-06cs
dc.description.abstractA new solution for an ultra-low-voltage, ultra-low-power operational transconductance amplifier (OTA) is presented in the paper. The design exploits a three-stage structure with a Reversed Miller Compensation Scheme, where the input stage is based on a non-tailed bulk-driven differential pair. Optimization of the structure for very low supply voltage is discussed. The resulting amplifier outperforms other ultra-low-voltage OTAs in terms of a DC voltage gain and power efficiency, expressed by standard figures of merit. Experimental verification using a 0.18 mu m CMOS technology, with supply voltage of 0.3-V, showed a dissipation power of 13 nW, a DC voltage gain of 98 dB, a gain-bandwidth product of 3.1 kHz and an average slew-rate of 9.1 V/ms at 30 pF load capacitance. The experimental results agree well with simulations.en
dc.formattextcs
dc.format.extent27459-27467cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationIEEE Access. 2020, vol. 8, issue 1, IF: 3.745, p. 27459-27467.en
dc.identifier.doi10.1109/ACCESS.2020.2972067cs
dc.identifier.issn2169-3536cs
dc.identifier.other163742cs
dc.identifier.urihttp://hdl.handle.net/11012/186886
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofIEEE Accesscs
dc.relation.urihttps://ieeexplore.ieee.org/document/8985331/cs
dc.rightsCreative Commons Attribution 4.0 Internationalcs
dc.rights.accessopenAccesscs
dc.rights.sherpahttp://www.sherpa.ac.uk/romeo/issn/2169-3536/cs
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/cs
dc.subjectBulk-drivenen
dc.subjectoperational transconductance amplifieren
dc.subjectoperational amplifieren
dc.subjectlow voltageen
dc.subjectlow poweren
dc.titleA 0.3-V 98-dB Rail-to-Rail OTA in 0.18 um CMOSen
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
sync.item.dbidVAV-163742en
sync.item.dbtypeVAVen
sync.item.insts2021.01.20 12:59:54en
sync.item.modts2021.01.20 12:16:50en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav mikroelektronikycs
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