Solar Power Inverter

but.event.date	28.04.2016	cs
but.event.title	Student EEICT 2016	cs
dc.contributor.author	Gottwald, Petr
dc.date.accessioned	2018-07-10T12:48:15Z
dc.date.available	2018-07-10T12:48:15Z
dc.date.issued	2016	cs
dc.description.abstract	Design of a solar power inverter with 1 kW output power capability is discussed in this paper. Interleaved boost topology used in the step-up stage as well as the output full-bridge stage are described. Control block utilizing Field-programmable-gate-array (FPGA) is described as well.	en
dc.format	text	cs
dc.format.extent	234-236	cs
dc.format.mimetype	application/pdf	en
dc.identifier.citation	Proceedings of the 22nd Conference STUDENT EEICT 2016. s. 234-236. ISBN 978-80-214-5350-0	cs
dc.identifier.isbn	978-80-214-5350-0
dc.identifier.uri	http://hdl.handle.net/11012/83927
dc.language.iso	en	cs
dc.publisher	Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií	cs
dc.relation.ispartof	Proceedings of the 22nd Conference STUDENT EEICT 2016	en
dc.relation.uri	http://www.feec.vutbr.cz/EEICT/	cs
dc.rights	© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií	cs
dc.rights.access	openAccess	en
dc.subject	FPGA	en
dc.subject	boost converter	en
dc.subject	full-bridge converter	en
dc.subject	MPPT	en
dc.title	Solar Power Inverter	en
dc.type.driver	conferenceObject	en
dc.type.status	Peer-reviewed	en
dc.type.version	publishedVersion	en
eprints.affiliatedInstitution.department	Fakulta elektrotechniky a komunikačních technologií	cs

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