VDIBA-Based Fractional-Order Oscillator Design

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dc.contributor.authorKartci, Aslihancs
dc.contributor.authorHerencsár, Norbertcs
dc.contributor.authorDvořák, Jancs
dc.contributor.authorVrba, Kamilcs
dc.date.issued2019-07-01cs
dc.description.abstractThis paper deals with a voltage-mode integer- and fractional-order oscillator design providing compact and simple CMOS structure. The proposed circuit consists of only one grounded/floating capacitor, one grounded/floating resistor, and one high-performance and versatile active element so-called voltage differencing inverting buffered amplifier (VDIBA), employing only six transistors. Compared with the corresponding already introduced fractional-order oscillators, it offers the benefit of low transistor count. In addition, it offers the well-known advantages of fractional-order oscillators about the capability for achieving very low and high oscillation frequencies with reasonable component values. The design parameters of the proposed oscillator can be electronically adjusted via change of order of the fractional-order capacitor and/or by means of bias current of the internal transconductance of the VDIBA. Theoretical results are verified by SPICE simulations using TSMC 0.18 m level-7 LO EPI SCN018 CMOS process parameters with ±0.9 V supply voltages.en
dc.formattextcs
dc.format.extent744-747cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationProceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary. 2019, p. 744-747.en
dc.identifier.doi10.1109/TSP.2019.8769104cs
dc.identifier.isbn978-1-7281-1864-2cs
dc.identifier.orcid0000-0001-5690-7574cs
dc.identifier.orcid0000-0002-9504-2275cs
dc.identifier.orcid0009-0004-3915-9825cs
dc.identifier.orcid0000-0001-8214-8129cs
dc.identifier.other157634cs
dc.identifier.researcheridE-2150-2018cs
dc.identifier.researcheridA-6539-2009cs
dc.identifier.researcheridP-7120-2017cs
dc.identifier.scopus55576535400cs
dc.identifier.scopus23012051100cs
dc.identifier.scopus57188853049cs
dc.identifier.urihttp://hdl.handle.net/11012/180510
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofProceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungarycs
dc.relation.urihttps://ieeexplore.ieee.org/document/8769104cs
dc.rights(C) IEEEcs
dc.rights.accessopenAccesscs
dc.subjectfractional calculusen
dc.subjectfractional-order capacitoren
dc.subjectfractional-order oscillatoren
dc.subjectMOS-RC oscillatoren
dc.subjectoperational transconductance amplifieren
dc.subjectvoltage differencing inverting buffered amplifieren
dc.subjectValsa structureen
dc.subjectVDIBAen
dc.titleVDIBA-Based Fractional-Order Oscillator Designen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
sync.item.dbidVAV-157634en
sync.item.dbtypeVAVen
sync.item.insts2025.02.03 15:42:02en
sync.item.modts2025.01.17 19:33:28en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
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