VDIBA-Based Fractional-Order Oscillator Design
Loading...
Date
2019-07-01
ORCID
Advisor
Referee
Mark
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE
Altmetrics
Abstract
This paper deals with a voltage-mode integer- and fractional-order oscillator design providing compact and simple CMOS structure. The proposed circuit consists of only one grounded/floating capacitor, one grounded/floating resistor, and one high-performance and versatile active element so-called voltage differencing inverting buffered amplifier (VDIBA), employing only six transistors. Compared with the corresponding already introduced fractional-order oscillators, it offers the benefit of low transistor count. In addition, it offers the well-known advantages of fractional-order oscillators about the capability for achieving very low and high oscillation frequencies with reasonable component values. The design parameters of the proposed oscillator can be electronically adjusted via change of order of the fractional-order capacitor and/or by means of bias current of the internal transconductance of the VDIBA. Theoretical results are verified by SPICE simulations using TSMC 0.18 m level-7 LO EPI SCN018 CMOS process parameters with ±0.9 V supply voltages.
Description
Citation
Proceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary. 2019, p. 744-747.
https://ieeexplore.ieee.org/document/8769104
https://ieeexplore.ieee.org/document/8769104
Document type
Peer-reviewed
Document version
Accepted version
Date of access to the full text
Language of document
en
Study field
Comittee
Date of acceptance
Defence
Result of defence
Document licence
(C) IEEE