Comparison of MOSFET Gate Waffle Patterns Based on Specific On-Resistance

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dc.contributor.authorVacula, Patrik
dc.contributor.authorKote, Vlastimil
dc.contributor.authorBarri, Dalibor
dc.contributor.authorVacula, Milos
dc.contributor.authorHusak, Miroslav
dc.contributor.authorJakovenko, Jiri
dc.contributor.authorPrivitera, Salvatore
dc.coverage.issue3cs
dc.coverage.volume28cs
dc.date.accessioned2020-04-30T11:26:15Z
dc.date.available2020-04-30T11:26:15Z
dc.date.issued2019-09cs
dc.description.abstractThis article describes waffle power MOSFET segmentation and defines its analytic models. Although waffle gate pattern is well-known architecture for effective channel scaling without requirements on process modification, no until today precise model considering segmentation of MOSFETs with waffle gate patterns, due to bulk connections, has been there proposed. Two different MOSFET topologies with gate waffle patterns have been investigated and compared with the same on-resistance of a standard MOSFET with finger gate pattern. The first one with diagonal metal interconnections allows reaching more than 40 % area reduction. The second MOSFET with the more simple orthogonal metal interconnections allows saving more than 20 % area. Moreover, new models defining conditions where segmented power MOSFETs with waffle gate patterns occupy less area than the standard MOSFET with finger gate pattern, have been introduced.en
dc.formattextcs
dc.format.extent598-609cs
dc.format.mimetypeapplication/pdfen
dc.identifier.citationRadioengineering. 2019 vol. 28, č. 3, s. 598-609. ISSN 1210-2512cs
dc.identifier.doi10.13164/re.2019.0598en
dc.identifier.issn1210-2512
dc.identifier.urihttp://hdl.handle.net/11012/186902
dc.language.isoencs
dc.publisherSpolečnost pro radioelektronické inženýrstvícs
dc.relation.ispartofRadioengineeringcs
dc.relation.urihttps://www.radioeng.cz/fulltexts/2019/19_03_0598_0609.pdfcs
dc.rightsCreative Commons Attribution 4.0 International licenseen
dc.rights.accessopenAccessen
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/en
dc.subjectPower MOSFETen
dc.subjectwaffle MOSFETen
dc.subjectspecific on-resistanceen
dc.subjectintegrated circuitsen
dc.titleComparison of MOSFET Gate Waffle Patterns Based on Specific On-Resistanceen
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
eprints.affiliatedInstitution.facultyFakulta eletrotechniky a komunikačních technologiícs
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