All-Pass Time Delay Circuit Magnitude Response Optimization Using Fractional-Order Capacitor

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dc.contributor.authorHerencsár, Norbertcs
dc.contributor.authorKartci, Aslihancs
dc.contributor.authorTlelo-Cuautle, Estebancs
dc.contributor.authorMetin, Bilgincs
dc.contributor.authorCicekoglu, Oguzhancs
dc.date.issued2018-08-05cs
dc.description.abstractPaper presents the integer- and fractional-order cases of a voltage-mode all-pass time delay circuit, or more frequently called as all-pass filter, employing a single negative-type current-controlled current inverting transconductance amplifier and a floating capacitor. Utilization of a fractional-order capacitor (FoC) C0,06 with 12 pF " sec.04 value for magnitude response optimization of the filter is investigated. FoC was emulated via 4th-order Valsa RC network and values optimized using modified least squares quadratic method. In frequency range MHz-I GlIz it shows only +0.5 degree phase angle deviation and the relative pseudo-capacitance error varies from-1.85% to +0.73%. SPICE simulations are given to prove the theory.en
dc.formattextcs
dc.format.extent129-132cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationProceedings of the 2018 61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS). 2018, p. 129-132.en
dc.identifier.doi10.1109/MWSCAS.2018.8624059cs
dc.identifier.isbn978-1-5386-7392-8cs
dc.identifier.orcid0000-0002-9504-2275cs
dc.identifier.orcid0000-0001-5690-7574cs
dc.identifier.other149105cs
dc.identifier.researcheridA-6539-2009cs
dc.identifier.researcheridE-2150-2018cs
dc.identifier.scopus23012051100cs
dc.identifier.scopus55576535400cs
dc.identifier.urihttp://hdl.handle.net/11012/194802
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofProceedings of the 2018 61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)cs
dc.relation.urihttps://ieeexplore.ieee.org/document/8624059cs
dc.rights(C) IEEEcs
dc.rights.accessopenAccesscs
dc.subjectall-pass filteren
dc.subjectCCCITA-en
dc.subjectfractional-order capacitoren
dc.subjectFoCen
dc.subjectfractional-order filteren
dc.subjecttime delay circuiten
dc.subjectvoltage-modeen
dc.titleAll-Pass Time Delay Circuit Magnitude Response Optimization Using Fractional-Order Capacitoren
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionacceptedVersionen
sync.item.dbidVAV-149105en
sync.item.dbtypeVAVen
sync.item.insts2025.02.03 15:42:05en
sync.item.modts2025.01.17 18:45:17en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
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