Design of Shadow Filter Using Low-Voltage Multiple-Input Operational Transconductance Amplifiers
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Kumngern, Montree
Khateb, Fabian
Kulej, Tomasz
Wattikornsirikul, Natchayathorn
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Mark
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This paper introduces shadow filters that employ multiple-input operational transconductance amplifiers (MI-OTAs) as the active component. Two configurations of shadow filters are proposed. The first configuration, in contrast to previous designs, enables the adjustment of the quality factor without affecting the passband gains of the BPF, LPF, and HPF, thus achieving optimal frequency responses for these filters. The second configuration allows for the variation of the natural frequency without impacting the passband gains of the HPF, LPF, and BPF, maintaining constant passband gains. Moreover, the natural frequency can be electronically controlled by modifying parameters of the original biquad filters, providing advantages in compensating for process, voltage, and temperature variations. The MI-OTA is designed to provide multiple-input differential terminals using the multiple-input bulk-driven MOS transistor (MIBD-MOST) technique, allowing differential input signals to be converted into current output through its transconductance gain. The OTA operates at a supply voltage of 450 mV and consumes 81 nW of power, with the MOS transistors operating in weak inversion. The OTA and shadow filters were designed and simulated using a 0.18 mu m CMOS process to validate the functionality and performance of the proposed circuits.
This paper introduces shadow filters that employ multiple-input operational transconductance amplifiers (MI-OTAs) as the active component. Two configurations of shadow filters are proposed. The first configuration, in contrast to previous designs, enables the adjustment of the quality factor without affecting the passband gains of the BPF, LPF, and HPF, thus achieving optimal frequency responses for these filters. The second configuration allows for the variation of the natural frequency without impacting the passband gains of the HPF, LPF, and BPF, maintaining constant passband gains. Moreover, the natural frequency can be electronically controlled by modifying parameters of the original biquad filters, providing advantages in compensating for process, voltage, and temperature variations. The MI-OTA is designed to provide multiple-input differential terminals using the multiple-input bulk-driven MOS transistor (MIBD-MOST) technique, allowing differential input signals to be converted into current output through its transconductance gain. The OTA operates at a supply voltage of 450 mV and consumes 81 nW of power, with the MOS transistors operating in weak inversion. The OTA and shadow filters were designed and simulated using a 0.18 mu m CMOS process to validate the functionality and performance of the proposed circuits.
This paper introduces shadow filters that employ multiple-input operational transconductance amplifiers (MI-OTAs) as the active component. Two configurations of shadow filters are proposed. The first configuration, in contrast to previous designs, enables the adjustment of the quality factor without affecting the passband gains of the BPF, LPF, and HPF, thus achieving optimal frequency responses for these filters. The second configuration allows for the variation of the natural frequency without impacting the passband gains of the HPF, LPF, and BPF, maintaining constant passband gains. Moreover, the natural frequency can be electronically controlled by modifying parameters of the original biquad filters, providing advantages in compensating for process, voltage, and temperature variations. The MI-OTA is designed to provide multiple-input differential terminals using the multiple-input bulk-driven MOS transistor (MIBD-MOST) technique, allowing differential input signals to be converted into current output through its transconductance gain. The OTA operates at a supply voltage of 450 mV and consumes 81 nW of power, with the MOS transistors operating in weak inversion. The OTA and shadow filters were designed and simulated using a 0.18 mu m CMOS process to validate the functionality and performance of the proposed circuits.
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en
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