0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator

Abstract

This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.This paper presents new applications of low-voltage and low-power multiple-input multiple output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application ' s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage-and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18 mu m TSMC CMOS technology.