2012/2

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Now showing 1 - 5 of 30
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    Watermarking FPGA Bitfile for Intellectual Property Protection
    (Společnost pro radioelektronické inženýrství, 2012-06) Zhang, Jiliang; Lin, Yaping; Wu, Qiang; Che, Wenjie
    Intellectual property protection (IPP) of hardware designs is the most important requirement for many Field Programmable Gate Array (FPGA) intellectual property (IP) vendors. Digital watermarking has become an innovative technology for IPP in recent years. Existing watermarking techniques have successfully embedded watermark into IP cores. However, many of these techniques share two specific weaknesses: 1) They have extra overhead, and are likely to degrade performance of design; 2) vulnerability to removing attacks. We propose a novel watermarking technique to watermark FPGA bitfile for addressing these weaknesses. Experimental results and analysis show that the proposed technique incurs zero overhead and it is robust against removing attacks.
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    Downlink Video Streaming for Users Non-Equidistant from Base Station
    (Společnost pro radioelektronické inženýrství, 2012-06) Pejoski, Slavche; Kafedziski, Venceslav
    We consider multiuser video transmission for users that are non-equidistantly positioned from base station. We propose a greedy algorithm for video streaming in a wireless system with capacity achieving channel coding, that implements the cross-layer principle by partially separating the physical and the application layer. In such a system the parameters at the physical layer are dependent on the packet length and the conditions in the wireless channel and the parameters at the application layer are dependent on the reduction of the expected distortion assuming no packet errors in the system. We also address the fairness in the multiuser video system with non-equidistantly positioned users. Our fairness algorithm is based on modified opportunistic round robin scheduling. We evaluate the performance of the proposed algorithms by simulating the transmission of H.264/AVC video signals in a TDMA wireless system.
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    Low-Voltage Ultra-Low-Power Current Conveyor Based on Quasi-Floating Gate Transistors
    (Společnost pro radioelektronické inženýrství, 2012-06) Khateb, Fabian; Khatib, Nabhan; Kubanek, David
    The field of low-voltage low-power CMOS technology has grown rapidly in recent years; it is an essential prerequisite particularly for portable electronic equipment and implantable medical devices due to its influence on battery lifetime. Recently, significant improvements in implementing circuits working in the low-voltage low-power area have been achieved, but circuit designers face severe challenges when trying to improve or even maintain the circuit performance with reduced supply voltage. In this paper, a low-voltage ultra-low-power current conveyor second generation CCII based on quasi-floating gate transistors is presented. The proposed circuit operates at a very low supply voltage of only ±0.4 V with rail-to-rail voltage swing capability and a total quiescent power consumption of mere 9.5 µW. Further, the proposed circuit is not only able to process the AC signal as it's usual at quasi-floating gate transistors but also the DC which extends the applicability of the proposed circuit. In conclusion, an application example of the current-mode quadrature oscillator is presented. PSpice simulation results using the 0.18 µm TSMC CMOS technology are included to confirm the attractive properties of the proposed circuit.
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    A novel JPEG steganography method based on modulus function with histogram analysis
    (Společnost pro radioelektronické inženýrství, 2012-06) Banoci, Vladimir; Bugar, Gabriel; Levicky, Dusan; Klenovicova, Zita
    In this paper, we present a novel steganographic method for embedding of secret data in still grayscale JPEG image. In order to provide large capacity of the proposed method while maintaining good visual quality of stego-image, the embedding process is performed in quantized transform coefficients of Discrete Cosine transform (DCT) by modifying coefficients according to modulo function, what gives to the steganography system blind extraction predisposition. After-embedding histogram of proposed Modulo Histogram Fitting (MHF) method is analyzed to secure steganography system against steganalysis attacks. In addition, AES ciphering was implemented to increase security and improve histogram after-embedding characteristics of proposed steganography system as experimental results show.
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    A Modified Bipolar Translinear Cell with Improved Linear Range and Its Applications
    (Společnost pro radioelektronické inženýrství, 2012-06) Merz, Naruemol; Kiranon, Wiwat; Wongtachathum, Chariya; Pawarangkoon, Prajuab; Narksarp, Wipavan
    This paper presents a technique to extend the linear input voltage range of a sinh mixed translinear cell proposed by Fabre [1]. This technique extends the linear operation range of the circuit by inserting common-anode-connected pairs into the mixed translinear cell. Then the relationship between the output current and the input voltage is developed to be linear. The transconductance gain can be adjusted electronically while keeping its linearity. The performance of the proposed circuit is verified by mathematical analysis and by SPICE simulations. Finally, applications of the proposed cell in a floating resistor and a CCCII for designing an instrumentation amplifier are presented.