Fully CMOS Memristor Based Chaotic Circuit

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dc.contributor.authorYener, Suayb Cagri
dc.contributor.authorKuntman, H. Hakan
dc.coverage.issue4cs
dc.coverage.volume23cs
dc.date.accessioned2014-12-16T09:35:39Z
dc.date.available2014-12-16T09:35:39Z
dc.date.issued2014-12cs
dc.description.abstractThis paper demonstrates the design of a fully CMOS chaotic circuit consisting of only DDCC based memristor and inductance simulator. Our design is composed of these active blocks using CMOS 0.18 µm process technology with symmetric ±1.25 V supply voltages. A new single DDCC+ based topology is used as the inductance simulator. Simulation results verify that the design proposed satisfies both memristor properties and the chaotic behavior of the circuit. Simulations performed illustrate the success of the proposed design for the realization of CMOS based chaotic applications.en
dc.formattextcs
dc.format.extent1140-1149cs
dc.format.mimetypeapplication/pdfen
dc.identifier.citationRadioengineering. 2014, vol. 23, č. 4, s. 1140-1149. ISSN 1210-2512cs
dc.identifier.issn1210-2512
dc.identifier.urihttp://hdl.handle.net/11012/36572
dc.language.isoencs
dc.publisherSpolečnost pro radioelektronické inženýrstvícs
dc.relation.ispartofRadioengineeringcs
dc.relation.urihttp://www.radioeng.cz/fulltexts/2014/14_04_1140_1149.pdfcs
dc.rightsCreative Commons Attribution 3.0 Unported Licenseen
dc.rights.accessopenAccessen
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/en
dc.subjectMemristoren
dc.subjectCMOS designen
dc.subjectDDCCen
dc.subjectChua's circuiten
dc.subjectchaotic oscillators.en
dc.titleFully CMOS Memristor Based Chaotic Circuiten
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
eprints.affiliatedInstitution.facultyFakulta eletrotechniky a komunikačních technologiícs
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