Design of Second Order Recursive Digital Integrators with Matching Phase and Magnitude Response
dc.contributor.author | Garg, Kriti | |
dc.contributor.author | Upadhyay, Dharmendra K. | |
dc.coverage.issue | 1 | cs |
dc.coverage.volume | 26 | cs |
dc.date.accessioned | 2017-04-18T08:21:46Z | |
dc.date.available | 2017-04-18T08:21:46Z | |
dc.date.issued | 2017-04 | cs |
dc.description.abstract | Location of poles and zeroes greatly affect phase response and magnitude response of a system. Recently, pole-zero optimization emerged as an effective approach to approximately match magnitude response of a system with that of an ideal one. In this brief, a methodology for the design of linear phase integrators and ones with constant phase of -90 degree is proposed. The aim of this method is to simultaneously attain multiple objectives of magnitude and phase optimization. In this method, magnitude response error is minimized under the constraint that the maximum passband phase-response error is below a prescribed level. Examples are included to illustrate the proposed design technique. | en |
dc.format | text | cs |
dc.format.extent | 376-386 | cs |
dc.format.mimetype | application/pdf | en |
dc.identifier.citation | Radioengineering. 2017 vol. 26, č. 1, s. 376-386. ISSN 1210-2512 | cs |
dc.identifier.doi | 10.13164/re.2017.0376 | en |
dc.identifier.issn | 1210-2512 | |
dc.identifier.uri | http://hdl.handle.net/11012/64747 | |
dc.language.iso | en | cs |
dc.publisher | Společnost pro radioelektronické inženýrství | cs |
dc.relation.ispartof | Radioengineering | cs |
dc.relation.uri | http://www.radioeng.cz/fulltexts/2017/17_01_0376_0386.pdf | cs |
dc.rights | Creative Commons Attribution 4.0 International | en |
dc.rights.access | openAccess | en |
dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | en |
dc.subject | Digital integrator | en |
dc.subject | genetic algorithm | en |
dc.subject | linear phase | en |
dc.subject | polezero optimization | en |
dc.subject | recursive | en |
dc.subject | simulated annealing | en |
dc.title | Design of Second Order Recursive Digital Integrators with Matching Phase and Magnitude Response | en |
dc.type.driver | article | en |
dc.type.status | Peer-reviewed | en |
dc.type.version | publishedVersion | en |
eprints.affiliatedInstitution.faculty | Fakulta eletrotechniky a komunikačních technologií | cs |
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