Pipelined Two-Operand Modular Adders
| dc.contributor.author | Czyzak, Maciej | |
| dc.contributor.author | Horiszny, Jacek | |
| dc.contributor.author | Smyk, Robert | |
| dc.coverage.issue | 1 | cs |
| dc.coverage.volume | 24 | cs |
| dc.date.accessioned | 2015-05-21T11:43:52Z | |
| dc.date.available | 2015-05-21T11:43:52Z | |
| dc.date.issued | 2015-04 | cs |
| dc.description.abstract | Pipelined two-operand modular adder (TOMA) is one of basic components used in digital signal processing (DSP) systems that use the residue number system (RNS). Such modular adders are used in binary/residue and residue/binary converters, residue multipliers and scalers as well as within residue processing channels. The design of pipelined TOMAs is usually obtained by inserting an appriopriate number of latch layers inside a nonpipelined TOMA structure. Hence their area is also determined by the number of latches and the delay by the number of latch layers. In this paper we propose a new pipelined TOMA that is based on a new TOMA, that has the smaller area and smaller delay than other known structures. Comparisons are made using data from the very large scale of integration (VLSI) standard cell library. | en |
| dc.format | text | cs |
| dc.format.extent | 148-160 | cs |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Radioengineering. 2015 vol. 24, č. 1, s. 148-160. ISSN 1210-2512 | cs |
| dc.identifier.doi | 10.13164/re.2015.0148 | en |
| dc.identifier.issn | 1210-2512 | |
| dc.identifier.uri | http://hdl.handle.net/11012/38745 | |
| dc.language.iso | en | cs |
| dc.publisher | Společnost pro radioelektronické inženýrství | cs |
| dc.relation.ispartof | Radioengineering | cs |
| dc.relation.uri | http://www.radioeng.cz/fulltexts/2015/15_01_0148_0160.pdf | cs |
| dc.rights | Creative Commons Attribution 3.0 Unported License | en |
| dc.rights.access | openAccess | en |
| dc.rights.uri | http://creativecommons.org/licenses/by/3.0/ | en |
| dc.subject | Carry-lookahead adder | en |
| dc.subject | FPGA | en |
| dc.subject | modular adder | en |
| dc.subject | parallel-prefix adder | en |
| dc.subject | residue number system | en |
| dc.subject | RNS | en |
| dc.subject | ripple-carry adder | en |
| dc.subject | VLSI design | en |
| dc.title | Pipelined Two-Operand Modular Adders | en |
| dc.type.driver | article | en |
| dc.type.status | Peer-reviewed | en |
| dc.type.version | publishedVersion | en |
| eprints.affiliatedInstitution.faculty | Fakulta eletrotechniky a komunikačních technologií | cs |