Direct Learning Architecture For Digital Predistortion With Real-Valued Feedback

Abstract

The power efficiency is a key parameter of modern comunication systems. Efficient nonlinear power amplifiers are linearised using digital predistorters. Conventional predistorters require two ADCs in the feedback. In this paper we have proposed a modification of the direct learning architecture using solely one ADC in the feedback and an RF mixer instead of a quadrature mixer. This allows us to minimise the system complexity and power consumtion and maximise the efficiency. The proposed architecture has been verified experimentally and compared to the conventional digital predistorters. We have shown that it can achieve same linearisation performance as the conventional architecture with two ADCs. Moreover the proposed method outperformed the conventional DPD with indirect learning architecture.