An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter
dc.contributor.author | Jelinek, Martin | |
dc.contributor.author | Jakovenko, Jiri | |
dc.coverage.issue | 2 | cs |
dc.coverage.volume | 26 | cs |
dc.date.accessioned | 2017-07-25T08:20:36Z | |
dc.date.available | 2017-07-25T08:20:36Z | |
dc.date.issued | 2017-06 | cs |
dc.description.abstract | This paper provides analysis of output capacitor effects to phase stability of a hysteretic mode controlled buck converter. The hysteretic control method is a simple and fast control technique for switched-mode converters, but the hysteresis control is not oscillator referenced. It results in difficulty to achieve stable switching phase and frequency. In recent papers, the authors propose a use of phase locked loops (PLL) to permit interleaved multiphase operation where each voltage regulator (VR) module is coupled together via output node and leads to a strong loop interaction. In this work analysis of this interaction is studied by Matlab Simulink simulations and a new solution how to partially suppress this effect is given. The proposed method confirms the theoretical analysis. | en |
dc.format | text | cs |
dc.format.extent | 515-521 | cs |
dc.format.mimetype | application/pdf | en |
dc.identifier.citation | Radioengineering. 2017 vol. 26, č. 2, s. 515-521. ISSN 1210-2512 | cs |
dc.identifier.doi | 10.13164/re.2017.0515 | en |
dc.identifier.issn | 1210-2512 | |
dc.identifier.uri | http://hdl.handle.net/11012/69269 | |
dc.language.iso | en | cs |
dc.publisher | Společnost pro radioelektronické inženýrství | cs |
dc.relation.ispartof | Radioengineering | cs |
dc.relation.uri | https://www.radioeng.cz/fulltexts/2017/17_02_0515_0521.pdf | cs |
dc.rights | Creative Commons Attribution 4.0 International License | en |
dc.rights.access | openAccess | en |
dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | en |
dc.subject | SMPS | en |
dc.subject | Buck | en |
dc.subject | hysteretic mode control | en |
dc.subject | interleaving | en |
dc.subject | PLL | en |
dc.subject | multi-phase. | en |
dc.title | An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter | en |
dc.type.driver | article | en |
dc.type.status | Peer-reviewed | en |
dc.type.version | publishedVersion | en |
eprints.affiliatedInstitution.faculty | Fakulta eletrotechniky a komunikačních technologií | cs |
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