A CMOS Morlet Wavelet Generator
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Date
2017-04
Authors
Israel Bautista-Castillo, Alejandro
Miguel Rocha-Perez, Jose
Diaz-Sanchez, Alejandro
Lemus-Lopez, Javier
Abraham Sanchez-Gaspariano, Luis
ORCID
Advisor
Referee
Mark
Journal Title
Journal ISSN
Volume Title
Publisher
Společnost pro radioelektronické inženýrství
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Abstract
The design and characterization of a CMOS circuit for Morlet wavelet generation is introduced. With the proposed Morlet wavelet circuit, it is possible to reach a~low power consumption, improve standard deviation (σ) control and also have a small form factor. A prototype in a double poly, three metal layers, 0.5 µm CMOS process from MOSIS foundry was carried out in order to verify the functionality of the proposal. However, the design methodology can be extended to different CMOS processes. According to the performance exhibited by the circuit, may be useful in many different signal processing tasks such as nonlinear time-variant systems.
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Citation
Radioengineering. 2017 vol. 26, č. 1, s. 263-268. ISSN 1210-2512
http://www.radioeng.cz/fulltexts/2017/17_01_0263_0268.pdf
http://www.radioeng.cz/fulltexts/2017/17_01_0263_0268.pdf
Document type
Peer-reviewed
Document version
Published version
Date of access to the full text
Language of document
en