On Systematic Design of Fractional-Order Element Series

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dc.contributor.authorKoton, Jaroslavcs
dc.contributor.authorKubánek, Davidcs
dc.contributor.authorDvořák, Jancs
dc.contributor.authorHerencsár, Norbertcs
dc.coverage.issue4cs
dc.coverage.volume21cs
dc.date.accessioned2021-02-17T11:58:30Z
dc.date.available2021-02-17T11:58:30Z
dc.date.issued2021-02-09cs
dc.description.abstractIn this paper a concept for the efficient design of a series of floating fractional-order elements (FOEs) is proposed. Using even single or a very limited number of so-called “seed” FOEs it is possible to obtain a wide set of new FOEs featuring fractional order being in the range [-n,n], where n is an arbitrary integer number, and hence enables to overcome the lack of commercial unavailability of FOEs. The systematic design stems from the utilization of a general immittance converter (GIC), whereas the concept is further developed by proposing a general circuit structure of the GIC that employs operational transconductance amplifiers (OTAs) as active elements. To show the efficiency of the presented approach, the use of only up to two “seed” FOEs with a properly selected fractional order seed as passive elements results in the design of a series of 51 FOEs with different being in the range [-2,2] that may find their utilization in sensor applications and the design of analog signal processing blocks. Comprehensive analysis of the proposed GIC is given, whereas the effect of parasitic properties of the assumed active elements is determined and the optimization process described to improve the overall performance of the GIC. Using OTAs designed in 0.18 m TSMC CMOS technology, Cadence Virtuoso post-layout simulation results of the GIC are presented that prove its operability, performance optimization, and robustness of the proposed design concept.en
dc.formattextcs
dc.format.extent1-23cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationSENSORS. 2021, vol. 21, issue 4, p. 1-23.en
dc.identifier.doi10.3390/s21041203cs
dc.identifier.issn1424-8220cs
dc.identifier.other169267cs
dc.identifier.urihttp://hdl.handle.net/11012/196333
dc.language.isoencs
dc.publisherMDPIcs
dc.relation.ispartofSENSORScs
dc.relation.urihttps://www.mdpi.com/1424-8220/21/4/1203/htmcs
dc.rightsCreative Commons Attribution 4.0 Internationalcs
dc.rights.accessopenAccesscs
dc.rights.sherpahttp://www.sherpa.ac.uk/romeo/issn/1424-8220/cs
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/cs
dc.subjectfractoren
dc.subjectfractional-order elementen
dc.subjectgeneralized immittance converteren
dc.subjectseries design of fractorsen
dc.subject“seed” FOEen
dc.titleOn Systematic Design of Fractional-Order Element Seriesen
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
sync.item.dbidVAV-169267en
sync.item.dbtypeVAVen
sync.item.insts2021.04.14 08:55:20en
sync.item.modts2021.04.14 08:15:07en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
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