A 159 μW, Fourth Order, Feedforward, Mutli-bit Sigma Delta Modulator for 100 kHz Bandwidth Image Sensors in 65-nm CMOS Process
dc.contributor.author | Bashir, Mudasir | |
dc.contributor.author | Rao Patri, Sreehari | |
dc.contributor.author | Krishnaprasad, K. S. R. | |
dc.coverage.issue | 2 | cs |
dc.coverage.volume | 27 | cs |
dc.date.accessioned | 2018-06-18T12:49:19Z | |
dc.date.available | 2018-06-18T12:49:19Z | |
dc.date.issued | 2018-06 | cs |
dc.description.abstract | A fourth-order, three-stage, feedforward cascade sigma-delta modulator (ƩΔM) for CMOS image sensor applications is realized in low leakage, high threshold voltage 65 nm CMOS standard process. A top down CAD methodology is used for the design of building blocks, which involves statistical and simulation optimization at different stages of modulator. The multi-bit ƩΔ architecture employs OTA sharing technique with the dual integrating scheme at the first stage and the gain boosted pseudo-differential class-C inverters as OTAs for the rest two stages for low area and power consumption. The operation of proposed ƩΔM is validated through post-layout simulations, considering worst case. The ƩΔM operates at a power supply of 1-V offering a peak signal-to-ratio of 92 dB and a peak signal-to-noise plus distortion ratio of 89 dB for a signal bandwidth of 100 kHz. The overall power and estimated area consumed by the ƩΔM including auxiliary blocks is 159 µW and 101.2 mm2, respectively. | en |
dc.format | text | cs |
dc.format.extent | 519-531 | cs |
dc.format.mimetype | application/pdf | en |
dc.identifier.citation | Radioengineering. 2018 vol. 27, č. 2, s. 519-531. ISSN 1210-2512 | cs |
dc.identifier.doi | 10.13164/re.2018.0519 | en |
dc.identifier.issn | 1210-2512 | |
dc.identifier.uri | http://hdl.handle.net/11012/83036 | |
dc.language.iso | en | cs |
dc.publisher | Společnost pro radioelektronické inženýrství | cs |
dc.relation.ispartof | Radioengineering | cs |
dc.relation.uri | https://www.radioeng.cz/fulltexts/2018/18_02_0519_0531.pdf | cs |
dc.rights | Creative Commons Attribution 4.0 International | en |
dc.rights.access | openAccess | en |
dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | en |
dc.subject | Analog front end | en |
dc.subject | CMOS image sensor | en |
dc.subject | sigma-delta modulator | en |
dc.subject | signal-to noise ratio | en |
dc.subject | switch capacitor circuits | en |
dc.subject | gain boosted technology | en |
dc.subject | dynamic element matching | en |
dc.title | A 159 μW, Fourth Order, Feedforward, Mutli-bit Sigma Delta Modulator for 100 kHz Bandwidth Image Sensors in 65-nm CMOS Process | en |
dc.type.driver | article | en |
dc.type.status | Peer-reviewed | en |
dc.type.version | publishedVersion | en |
eprints.affiliatedInstitution.faculty | Fakulta eletrotechniky a komunikačních technologií | cs |
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