FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

Kondys, D.; Smékal, D.

FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

but.event.date	26.04.2022	cs
but.event.title	STUDENT EEICT 2022	cs
dc.contributor.author	Kondys, D.
dc.contributor.author	Smékal, D.
dc.date.accessioned	2023-04-25T10:17:09Z
dc.date.available	2023-04-25T10:17:09Z
dc.date.issued	2022	cs
dc.description.abstract	Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.	en
dc.format	text	cs
dc.format.extent	303-306	cs
dc.format.mimetype	application/pdf	en
dc.identifier.citation	Proceedings I of the 28st Conference STUDENT EEICT 2022: General papers. s. 303-306. ISBN 978-80-214-6029-4	cs
dc.identifier.isbn	978-80-214-6029-4
dc.identifier.uri	http://hdl.handle.net/11012/209352
dc.language.iso	en	cs
dc.publisher	Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií	cs
dc.relation.ispartof	Proceedings I of the 28st Conference STUDENT EEICT 2022: General papers	en
dc.relation.uri	https://conf.feec.vutbr.cz/eeict/index/pages/view/ke_stazeni	cs
dc.rights	© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií	cs
dc.rights.access	openAccess	en
dc.subject	400 GbE	en
dc.subject	Agilex	en
dc.subject	CESNET	en
dc.subject	Ethernet	en
dc.subject	FPGA	en
dc.subject	Intel	en
dc.subject	NDK	en
dc.subject	Stratix 10	en
dc.title	FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet	en
dc.type.driver	conferenceObject	en
dc.type.status	Peer-reviewed	en
dc.type.version	publishedVersion	en
eprints.affiliatedInstitution.department	Fakulta elektrotechniky a komunikačních technologií	cs

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