FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

Kondys, D.; Smékal, D.

FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet

Files

eeict-general-303-306.pdf(5.92 MB)

Date

2022

Authors

Kondys, D.

Smékal, D.

Publisher

Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií

Abstract

Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.

Keywords

400 GbE, Agilex, CESNET, Ethernet, FPGA, Intel, NDK, Stratix 10

Citation

Proceedings I of the 28st Conference STUDENT EEICT 2022: General papers. s. 303-306. ISBN 978-80-214-6029-4
https://conf.feec.vutbr.cz/eeict/index/pages/view/ke_stazeni

Document type

Peer-reviewed

Document version

Published version

Language of document

en

Document licence