Innovative TCAM Solutions for IPv6 Lookup: Don't Care Reduction and Data Relocation Techniques

Abstract

Ternary Content-Addressable Memory (TCAM) enables high-speed searches by comparing search data with all stored data in a single clock cycle, using ternary logic ("0", "1", "X" for "don't care") for flexible matching. This makes TCAM ideal for applications like network routers and lookup tables. However, TCAM's speed increases silicon area and limits memory capacity. This paper introduces a low-area, enhanced-capacity TCAM for IPv6 lookup tables using Don't Care Reduction (DCR) and Data Relocation (DR) techniques. The DCR technique requires only (N + log_2(N))-bit memory for an N-bit IP address, reducing the need for 2N-bit memory. The DR technique improves TCAM storage capabilities by classifying the IPv6 into 4 different prefix length types and relocating the data in the prefix bit into the "X" cells. The design features a 256x128-bit TCAM (eight 32x128-bit memory banks) on a 65 nm process with a 1.2 V operation voltage. Results show a 71.47% increase in area efficiency per stored IP value compared to conventional TCAM and a 20.97% increase compared to data-relocation TCAM.