VLSI Implementation of Fixed-Point Lattice Wave Digital Filters for Increased Sampling Rate

dc.contributor.authorAgarwal, Meenakshi
dc.contributor.authorRawat, Tarun Kumar
dc.coverage.issue4cs
dc.coverage.volume25cs
dc.date.accessioned2017-01-27T06:24:10Z
dc.date.available2017-01-27T06:24:10Z
dc.date.issued2016-12cs
dc.description.abstractLow complexity and high speed are the key requirements of the digital filters. These filters can be realized using allpass filters. In this paper, design and minimum multiplier implementation of a fixed point lattice wave digital filter (WDF) based on three port parallel adaptor allpass structure is proposed. Here, the second-order allpass sections are implemented with three port parallel adaptor allpass structures. A design-level area optimization is done by converting constant multipliers into shifts and adds using canonical signed digit (CSD) techniques. The proposed implementation reduces the latency of the critical loop by reducing the number of components (adders and multipliers). Three design examples are included to analyze the effectiveness of the proposed approach. These are implemented in verilog HDL language and mapped to a standard cell library in a 0.18 μm CMOS process. The functionality of the implementations have been verified by applying number of different input vectors. Results and simulations demonstrate that the proposed design method leads to an efficient lattice WDF in terms of maximum sampling frequency. The cost to pay is small area overhead. The postlayout simulations have been done by HSPICE with CMOS transistors.en
dc.formattextcs
dc.format.extent821-829cs
dc.format.mimetypeapplication/pdfen
dc.identifier.citationRadioengineering. 2016 vol. 25, č. 4, s. 821-829. ISSN 1210-2512cs
dc.identifier.doi10.13164/re.2016.0821en
dc.identifier.issn1210-2512
dc.identifier.urihttp://hdl.handle.net/11012/63768
dc.language.isoencs
dc.publisherSpolečnost pro radioelektronické inženýrstvícs
dc.relation.ispartofRadioengineeringcs
dc.relation.urihttp://www.radioeng.cz/fulltexts/2016/16_04_0821_0829.pdfcs
dc.rightsCreative Commons Attribution 3.0 Unported Licenseen
dc.rights.accessopenAccessen
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/en
dc.subjectVLSI implementationen
dc.subjectlattice wave digital filtersen
dc.subjectthree port adaptoren
dc.subjectcanonical signed digit coefficienten
dc.subjectfixed point arithmeticen
dc.titleVLSI Implementation of Fixed-Point Lattice Wave Digital Filters for Increased Sampling Rateen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
eprints.affiliatedInstitution.facultyFakulta eletrotechniky a komunikačních technologiícs
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