Basic Block of Pipelined ADC Design Requirements
dc.contributor.author | Kledrowetz, Vilem | |
dc.contributor.author | Haze, Jiri | |
dc.coverage.issue | 1 | cs |
dc.coverage.volume | 20 | cs |
dc.date.accessioned | 2016-02-26T08:17:27Z | |
dc.date.available | 2016-02-26T08:17:27Z | |
dc.date.issued | 2011-04 | cs |
dc.description.abstract | The paper describes design requirements of a basic stage (called MDAC - Multiplying Digital-to- Analog Converter) of a pipelined ADC. There exist error sources such as finite DC gain of opamp, capacitor mismatch, thermal noise, etc., arising when the switched capacitor (SC) technique and CMOS technology are used. These non-idealities are explained and their influences on overall parameters of a pipelined ADC are studied. The pipelined ADC including non-idealities was modeled in MATLAB - Simulink simulation environment. | en |
dc.format | text | cs |
dc.format.extent | 234-238 | cs |
dc.format.mimetype | application/pdf | en |
dc.identifier.citation | Radioengineering. 2011, vol. 20, č. 1, s. 234-238. ISSN 1210-2512 | cs |
dc.identifier.issn | 1210-2512 | |
dc.identifier.uri | http://hdl.handle.net/11012/56824 | |
dc.language.iso | en | cs |
dc.publisher | Společnost pro radioelektronické inženýrství | cs |
dc.relation.ispartof | Radioengineering | cs |
dc.relation.uri | http://www.radioeng.cz/fulltexts/2011/11_01_234_238.pdf | cs |
dc.rights | Creative Commons Attribution 3.0 Unported License | en |
dc.rights.access | openAccess | en |
dc.rights.uri | http://creativecommons.org/licenses/by/3.0/ | en |
dc.subject | Pipelined ADC | en |
dc.subject | MDAC | en |
dc.subject | SC technique | en |
dc.subject | MATLAB model | en |
dc.subject | thermal noise | en |
dc.subject | opamp | en |
dc.title | Basic Block of Pipelined ADC Design Requirements | en |
dc.type.driver | article | en |
dc.type.status | Peer-reviewed | en |
dc.type.version | publishedVersion | en |
eprints.affiliatedInstitution.faculty | Fakulta eletrotechniky a komunikačních technologií | cs |
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