CMOS-based active RC sinusoidal oscillator with four-phase quadrature outputs and single-resistance-controlled (SRC) tuning laws

Abstract

This paper proposes a very compact CMOS realization of active RC sinusoidal oscillator capable of generating four quadrature voltage outputs. The oscillator is based on the cascade of lossless and lossy integrators in loop. The governing laws for the condition of oscillation (CO) and the frequency of oscillation (FO) are single-resistance-controlled (SRC) and which allow independent FO tuning. Unlike previously reported SRC-based sinusoidal oscillators based on the active building block (ABB) based approach and which aim at reducing the number of employed ABBs, this direct CMOS realization provides a much reduced transistor count circuit and consequently offers a low power solution. A comparison with previously reported SRC oscillators in terms of number of transistors and current consumption has been provided. As a design example, a 160.2 kHz oscillator (typical process, T = 27 deg. C) with 82 mW power consumption is designed in 65 nm CMOS technology with supply voltage of +-0.5 V.This paper proposes a very compact CMOS realization of active RC sinusoidal oscillator capable of generating four quadrature voltage outputs. The oscillator is based on the cascade of lossless and lossy integrators in loop. The governing laws for the condition of oscillation (CO) and the frequency of oscillation (FO) are single-resistance-controlled (SRC) and which allow independent FO tuning. Unlike previously reported SRC-based sinusoidal oscillators based on the active building block (ABB) based approach and which aim at reducing the number of employed ABBs, this direct CMOS realization provides a much reduced transistor count circuit and consequently offers a low power solution. A comparison with previously reported SRC oscillators in terms of number of transistors and current consumption has been provided. As a design example, a 160.2 kHz oscillator (typical process, T = 27 deg. C) with 82 mW power consumption is designed in 65 nm CMOS technology with supply voltage of +-0.5 V.