Implementation of Tetris Game on a FPGA
| but.committee | doc. Ing. Miloslav Steinbauer, Ph.D. (předseda) doc. Ing. Petr Drexler, Ph.D. (místopředseda) Mgr. Přemysl Dohnal (člen) prof. Ing. Eva Gescheidtová, CSc. (člen) | cs |
| but.defence | Student obhájil bakalářskou práci. Komise neměla žádné námitky k řešené práci. Student připravil odpovědi na otázky oponenta a odpověděl na ně bez výhrad. Otázky komise: Upřesnění blokového schématu, postup celé hry. Prodiskutovali se i limity hry, jako je zrychlení a otáčení bloků. | cs |
| but.jazyk | angličtina (English) | |
| but.program | Electrical Engineering | cs |
| but.result | práce byla úspěšně obhájena | cs |
| dc.contributor.advisor | Fujcik, Lukáš | en |
| dc.contributor.author | Rainha Godoy Santiago, Octávio | en |
| dc.contributor.referee | Steinbauer, Miloslav | en |
| dc.date.created | 2025 | cs |
| dc.description.abstract | The goal of the thesis is the implementation of the classic game Tetris on a Field- Programmable Gate Array (FPGA). The primary objective is to design and develop in Hardware Description Language (HDL) a version of Tetris with a modular approach, incorporating components such as game logic, user input handling through switches, and video output using a VGA module. The result will demonstrate the performance, resource utilization, practical challenges and solutions involved in developing real-time interactive systems on FPGAs. | en |
| dc.description.abstract | The goal of the thesis is the implementation of the classic game Tetris on a Field- Programmable Gate Array (FPGA). The primary objective is to design and develop in Hardware Description Language (HDL) a version of Tetris with a modular approach, incorporating components such as game logic, user input handling through switches, and video output using a VGA module. The result will demonstrate the performance, resource utilization, practical challenges and solutions involved in developing real-time interactive systems on FPGAs. | cs |
| dc.description.mark | B | cs |
| dc.identifier.citation | RAINHA GODOY SANTIAGO, O. Implementation of Tetris Game on a FPGA [online]. Brno: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. 2025. | cs |
| dc.identifier.other | 169690 | cs |
| dc.identifier.uri | http://hdl.handle.net/11012/254508 | |
| dc.language.iso | en | cs |
| dc.publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií | cs |
| dc.rights | Standardní licenční smlouva - přístup k plnému textu bez omezení | cs |
| dc.subject | FPGA | en |
| dc.subject | VHDL | en |
| dc.subject | Tetris | en |
| dc.subject | game logic | en |
| dc.subject | digital design | en |
| dc.subject | hardware synthesis | en |
| dc.subject | VGA interface | en |
| dc.subject | digital signal processing | en |
| dc.subject | Xilinx | en |
| dc.subject | FPGA | cs |
| dc.subject | VHDL | cs |
| dc.subject | Tetris | cs |
| dc.subject | game logic | cs |
| dc.subject | digital design | cs |
| dc.subject | hardware synthesis | cs |
| dc.subject | VGA interface | cs |
| dc.subject | digital signal processing | cs |
| dc.subject | Xilinx | cs |
| dc.title | Implementation of Tetris Game on a FPGA | en |
| dc.title.alternative | Implementation of Tetris Game on a FPGA | cs |
| dc.type | Text | cs |
| dc.type.driver | bachelorThesis | en |
| dc.type.evskp | bakalářská práce | cs |
| dcterms.dateAccepted | 2025-06-20 | cs |
| dcterms.modified | 2025-06-23-08:20:00 | cs |
| eprints.affiliatedInstitution.faculty | Fakulta elektrotechniky a komunikačních technologií | cs |
| sync.item.dbid | 169690 | en |
| sync.item.dbtype | ZP | en |
| sync.item.insts | 2025.08.26 23:02:20 | en |
| sync.item.modts | 2025.08.26 19:53:35 | en |
| thesis.discipline | Electronics and Communication Technologies | cs |
| thesis.grantor | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav mikroelektroniky | cs |
| thesis.level | Bakalářský | cs |
| thesis.name | Bc. | cs |
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