Embedded Platform for Automatic Testing and Optimizing of FPGA Based Cryptographic True Random Number Generators

dc.contributor.authorVarchola, Michal
dc.contributor.authorDrutarovsky, Milos
dc.coverage.issue4cs
dc.coverage.volume18cs
dc.date.accessioned2016-03-18T08:55:53Z
dc.date.available2016-03-18T08:55:53Z
dc.date.issued2009-12cs
dc.description.abstractThis paper deals with an evaluation platform for cryptographic True Random Number Generators (TRNGs) based on the hardware implementation of statistical tests for FPGAs. It was developed in order to provide an automatic tool that helps to speed up the TRNG design process and can provide new insights on the TRNG behavior as it will be shown on a particular example in the paper. It enables to test sufficient statistical properties of various TRNG designs under various working conditions on the fly. Moreover, the tests are suitable to be embedded into cryptographic hardware products in order to recognize TRNG output of weak quality and thus increase its robustness and reliability. Tests are fully compatible with the FIPS 140 standard and are implemented by the VHDL language as an IP-Core for vendor independent FPGAs. A recent Flash based Actel Fusion FPGA was chosen for preliminary experiments. The Actel version of the tests possesses an interface to the Actel’s CoreMP7 softcore processor that is fully compatible with the industry standard ARM7TDMI. Moreover, identical tests suite was implemented to the Xilinx Virtex 2 and 5 in order to compare the performance of the proposed solution with the performance of already published one based on the same FPGAs. It was achieved 25% and 65% greater clock frequency respectively while consuming almost equal resources of the Xilinx FPGAs. On the top of it, the proposed FIPS 140 architecture is capable of processing one random bit per one clock cycle which results in 311.5 Mbps throughput for Virtex 5 FPGA.en
dc.formattextcs
dc.format.extent631-638cs
dc.format.mimetypeapplication/pdfen
dc.identifier.citationRadioengineering. 2009, vol. 18, č. 4, s. 631-638. ISSN 1210-2512cs
dc.identifier.issn1210-2512
dc.identifier.urihttp://hdl.handle.net/11012/57161
dc.language.isoencs
dc.publisherSpolečnost pro radioelektronické inženýrstvícs
dc.relation.ispartofRadioengineeringcs
dc.relation.urihttp://www.radioeng.cz/fulltexts/2009/09_04_631_638.pdfcs
dc.rightsCreative Commons Attribution 3.0 Unported Licenseen
dc.rights.accessopenAccessen
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/en
dc.subjectTRNGen
dc.subjecton-chip randomness testsen
dc.subjectFIPS 140en
dc.subjectFPGAen
dc.titleEmbedded Platform for Automatic Testing and Optimizing of FPGA Based Cryptographic True Random Number Generatorsen
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
eprints.affiliatedInstitution.facultyFakulta eletrotechniky a komunikačních technologiícs
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