On The Efficiency Of Precise Fault Localization And Identification In No
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Date
Authors
Valachovič, Marek
Advisor
Referee
Mark
Journal Title
Journal ISSN
Volume Title
Publisher
Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
ORCID
Abstract
The paper joins the Bonfire NoC model, desrcibed in VHDL, together with a method of the precise localization and identification of faults in NoC and sums up a few findings about the efficiency of fault-tolerant NoC employing the method. A special focus is given to the area overhead and the mean time between failures in the presence of no or one permanent fault and some transient faults.
Description
Keywords
Network on chip , NoC , network switch , router , flow control , performance , fault tolerance , FPGA , VLSI
Citation
Proceedings I of the 26st Conference STUDENT EEICT 2020: General papers. s. 112-115. ISBN 978-80-214-5867-3
https://conf.feec.vutbr.cz/eeict/EEICT2020
https://conf.feec.vutbr.cz/eeict/EEICT2020
Document type
Peer-reviewed
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Published version
Date of access to the full text
Language of document
cs
