Wide-tunable LC-VCO design with a novel active inductor

Abstract

This paper presents the design of a wide-tunable, low-voltage, small-area LC voltage-controlled oscillator (LC-VCO). Instead of a spiral inductor, a novel active inductor is used in the conventional bottom-biased NMOS cross-coupled LC-VCO architecture. The oscillator, designed in TSMC 65 nm CMOS process and post-layout simulated in Cadence Design Suite, operates at a frequency range of 2.4 to 3.8 GHz and draws 8.5 mA from a 1.2 V supply. At a 1 MHz offset, the circuit has a phase noise of 80.22 dBc/Hz. The designed circuit has a differential output swing of 56.1 mV, and the percentage of total harmonic distortion (THD) is determined as 3.47% in the nominal case. The designed LC-VCO consumes only 0.013 mm silicon area. Additionally, a buffer circuit is presented that can be utilized to make the oscillation rail-to-rail.This paper presents the design of a wide-tunable, low-voltage, small-area LC voltage-controlled oscillator (LC-VCO). Instead of a spiral inductor, a novel active inductor is used in the conventional bottom-biased NMOS cross-coupled LC-VCO architecture. The oscillator, designed in TSMC 65 nm CMOS process and post-layout simulated in Cadence Design Suite, operates at a frequency range of 2.4 to 3.8 GHz and draws 8.5 mA from a 1.2 V supply. At a 1 MHz offset, the circuit has a phase noise of 80.22 dBc/Hz. The designed circuit has a differential output swing of 56.1 mV, and the percentage of total harmonic distortion (THD) is determined as 3.47% in the nominal case. The designed LC-VCO consumes only 0.013 mm silicon area. Additionally, a buffer circuit is presented that can be utilized to make the oscillation rail-to-rail.