Design of Novel CMOS DCCII with Reduced Parasitics and its All-Pass Filter Applications
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Date
2016-12-19
Authors
Arslan, Emre
Pal, Kirat
Herencsár, Norbert
Metin, Bilgin
ORCID
0000-0002-9504-2275Advisor
Referee
Mark
Journal Title
Journal ISSN
Volume Title
Publisher
Kaunas University of Technology
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Abstract
In this paper, a novel translinear loop based, high performance Complementary Metal-Oxide-Semiconductor (CMOS) second-generation differential current conveyor (DCCII) is introduced. By using super source follower transistors, very low equivalent impedances are obtained at input terminals xn and xp. In addition, new voltage-mode (VM) and current-mode (CM) first-order all-pass filters (APFs) are proposed to highlight the performance of the designed CMOS DCCII. The designed CMOS implementation is simulated with HSpice using AMS 0.35 µm real process parameters. It consumes only 1.3 mW power with using +/- 1.25 V power supply voltages. The simulation results of the proposed CMOS DCII circuit and the experimental results for designed VM APF are in very good agreement with the theoretical ones.
Description
Citation
Elektronika Ir Elektrotechnika. 2016, vol. 22, issue 6, p. 46-50.
https://eejournal.ktu.lt/index.php/elt/article/view/17222
https://eejournal.ktu.lt/index.php/elt/article/view/17222
Document type
Peer-reviewed
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Published version
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Language of document
en