Design Of Latched Comparator

Matěj, Jan

Design Of Latched Comparator

but.event.date	27.04.2017	cs
but.event.title	Student EEICT 2017	cs
dc.contributor.author	Matěj, Jan
dc.date.accessioned	2020-05-07T09:40:28Z
dc.date.available	2020-05-07T09:40:28Z
dc.date.issued	2017	cs
dc.description.abstract	This paper deals with design methods and optimization techniques of dynamic latched comparators. It compares lathed and continuous comparators and describes their principle. Then it analyses latched comparators with respect to the offset, speed and kickback noise. It shows practical comparator design focused on offset precision and kickback reduction.	en
dc.format	text	cs
dc.format.extent	263-265	cs
dc.format.mimetype	application/pdf	en
dc.identifier.citation	Proceedings of the 23st Conference STUDENT EEICT 2017. s. 263-265. ISBN 978-80-214-5496-5	cs
dc.identifier.isbn	978-80-214-5496-5
dc.identifier.uri	http://hdl.handle.net/11012/187102
dc.language.iso	cs	cs
dc.publisher	Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií	cs
dc.relation.ispartof	Proceedings of the 23st Conference STUDENT EEICT 2017	en
dc.relation.uri	http://www.feec.vutbr.cz/EEICT/	cs
dc.rights	© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií	cs
dc.rights.access	openAccess	en
dc.subject	Comparator	en
dc.subject	latched comparator	en
dc.subject	offset	en
dc.subject	propagation delay	en
dc.subject	kickback noise	en
dc.title	Design Of Latched Comparator	en
dc.type.driver	conferenceObject	en
dc.type.status	Peer-reviewed	en
dc.type.version	publishedVersion	en
eprints.affiliatedInstitution.department	Fakulta elektrotechniky a komunikačních technologií	cs

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