Hardware-Accelerated Cryptography For Software-Defined Networks

Simple item page
but.event.date27.04.2021cs
but.event.titleSTUDENT EEICT 2021cs
dc.contributor.authorCíbik, Peter
dc.date.accessioned2023-01-06T10:05:43Z
dc.date.available2023-01-06T10:05:43Z
dc.date.issued2021cs
dc.description.abstractThis paper presents a Software-Defined Network (SDN) cryptographic solution targetedon high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution providesa fast alternative method to develop network-oriented data processing cryptography applications foran accelerator. A high-level programming language – Programming Protocol-independent PacketProcessor (P4) – is used to avoid a complex and time-consuming hardware development. The solutionconsists of two main parts: a library of mainly used cryptographic primitives written in VHSICHardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function(SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signaturescheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDLwith the support for these cryptographic components as external objects of P416.en
dc.formattextcs
dc.format.extent126-130cs
dc.format.mimetypeapplication/pdfen
dc.identifier.citationProceedings II of the 27st Conference STUDENT EEICT 2021: Selected Papers. s. 126-130. ISBN 978-80-214-5943-4cs
dc.identifier.doi10.13164/eeict.2021.126
dc.identifier.isbn978-80-214-5943-4
dc.identifier.urihttp://hdl.handle.net/11012/200826
dc.language.isoencs
dc.publisherVysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.relation.ispartofProceedings II of the 27st Conference STUDENT EEICT 2021: Selected papersen
dc.relation.urihttps://conf.feec.vutbr.cz/eeict/index/pages/view/ke_stazenics
dc.rights© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.rights.accessopenAccessen
dc.subjectCryptographyen
dc.subjectHardware accelerationen
dc.subjectFPGAen
dc.subjectVHDLen
dc.subjectSoftware-Defined Networksen
dc.subjectP4en
dc.titleHardware-Accelerated Cryptography For Software-Defined Networksen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
eprints.affiliatedInstitution.departmentFakulta elektrotechniky a komunikačních technologiícs
Files
Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
126_EEICT_2021_2.pdf
Size:
664.02 KB
Format:
Adobe Portable Document Format
Description:
Download
Collections
Student EEICT 2021: Selected Papers