Implementation of AES Algorithm on FPGA
| but.event.date | 23.04.2015 | cs |
| but.event.title | Student EEICT 2015 | cs |
| dc.contributor.author | Smékal, D. | |
| dc.date.accessioned | 2015-08-25T08:42:56Z | |
| dc.date.available | 2015-08-25T08:42:56Z | |
| dc.date.issued | 2015 | cs |
| dc.description.abstract | This paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (FieldProgrammable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware. | en |
| dc.format | text | cs |
| dc.format.extent | 193-195 | cs |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.citation | Proceedings of the 21st Conference STUDENT EEICT 2015. s. 193-195. ISBN 978-80-214-5148-3 | cs |
| dc.identifier.isbn | 978-80-214-5148-3 | |
| dc.identifier.uri | http://hdl.handle.net/11012/42973 | |
| dc.language.iso | cs | cs |
| dc.publisher | Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií | cs |
| dc.relation.ispartof | Proceedings of the 21st Conference STUDENT EEICT 2015 | en |
| dc.relation.uri | http://www.feec.vutbr.cz/EEICT/ | cs |
| dc.rights | © Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií | cs |
| dc.rights.access | openAccess | en |
| dc.subject | Cryptography | en |
| dc.subject | FPGA | en |
| dc.subject | AES | en |
| dc.subject | VHDL | en |
| dc.title | Implementation of AES Algorithm on FPGA | en |
| dc.type.driver | conferenceObject | en |
| dc.type.status | Peer-reviewed | en |
| dc.type.version | publishedVersion | en |
| eprints.affiliatedInstitution.department | Fakulta elektrotechniky a komunikačních technologií | cs |