A Fully Differential Analog Front-End for Signal Processing from EMG Sensor in 28 nm FDSOI Technology
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Kledrowetz, Vilém
Prokop, Roman
Fujcik, Lukáš
Háze, Jiří
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Mark
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MDPI
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Abstract
This paper presents a novel analog front-end for EMG sensor signal processing powered by 1 V. Such a low supply voltage requires specific design steps enabled using the 28 nm fully depleted silicon on insulator (FDSOI) technology from STMicroelectronics. An active ground circuit is implemented to keep the input common-mode voltage close to the analog ground and to minimize external interference. The amplifier circuit comprises an input instrumentation amplifier (INA) and a programmable-gain amplifier (PGA). Both are implemented in a fully differential topology. The actual performance of the circuit is analyzed using the corner and Monte Carlo analyses that comprise fifth-hundred samples for the global and local process variations. The proposed circuit achieves a high common-mode rejection ratio (CMRR) of 105.5 dB and a high input impedance of 11 GO with a chip area of 0.09 mm(2).
This paper presents a novel analog front-end for EMG sensor signal processing powered by 1 V. Such a low supply voltage requires specific design steps enabled using the 28 nm fully depleted silicon on insulator (FDSOI) technology from STMicroelectronics. An active ground circuit is implemented to keep the input common-mode voltage close to the analog ground and to minimize external interference. The amplifier circuit comprises an input instrumentation amplifier (INA) and a programmable-gain amplifier (PGA). Both are implemented in a fully differential topology. The actual performance of the circuit is analyzed using the corner and Monte Carlo analyses that comprise fifth-hundred samples for the global and local process variations. The proposed circuit achieves a high common-mode rejection ratio (CMRR) of 105.5 dB and a high input impedance of 11 GO with a chip area of 0.09 mm(2).
This paper presents a novel analog front-end for EMG sensor signal processing powered by 1 V. Such a low supply voltage requires specific design steps enabled using the 28 nm fully depleted silicon on insulator (FDSOI) technology from STMicroelectronics. An active ground circuit is implemented to keep the input common-mode voltage close to the analog ground and to minimize external interference. The amplifier circuit comprises an input instrumentation amplifier (INA) and a programmable-gain amplifier (PGA). Both are implemented in a fully differential topology. The actual performance of the circuit is analyzed using the corner and Monte Carlo analyses that comprise fifth-hundred samples for the global and local process variations. The proposed circuit achieves a high common-mode rejection ratio (CMRR) of 105.5 dB and a high input impedance of 11 GO with a chip area of 0.09 mm(2).
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common-mode rejection ratio (CMRR) , fully differential difference amplifier (FDDA) , driven-right-leg circuit , active ground circuit , fully depleted silicon on insulator (FDSOI) , electromyography (EMG) , common-mode rejection ratio (CMRR) , fully differential difference amplifier (FDDA) , driven-right-leg circuit , active ground circuit , fully depleted silicon on insulator (FDSOI) , electromyography (EMG)
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en
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Except where otherwised noted, this item's license is described as Creative Commons Attribution 4.0 International

0000-0002-6720-1224 