Modelování HW designu v UGE
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Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract
Predmetom tejto práce bolo navrhnúť zásuvný modul pre program Univerzálny grafický editor, ktorý uživateľom umožní vytvárať návrh hardware. Návrh HW architektúry začína spravidla kreslením blokových schém navrhovaného systému. Návrh je potom zapísaný v niektorom z jazykov, slúžiacich pre popis hardware. Keďže implementácia návrhu v týchto jazykoch má modulárnu štruktúru, tzn. podobnú štruktúre blokovej schémy HW návrhu, je možné uvažovať o preklade schémy, ktorú v programe nakreslí vývojár, do zdrojového kódu jazyka pre popis hardware. Táto myšlienka má za cieľ uľahčiť návrhárom HW prácu, ktorá môže byť zautomatizovaná. Navrhnutý modul poskytuje prostriedky pre vytváranie HW schém a komponent na rôznej úrovni abstrakcie a interaktívne týmito úrovňami prechádzať. Modul tiež implementuje preklad nakreslenej HW schémy do kódu jazyka VHDL.
The goal of this thesis is to create a plugin for application Universal graphic editor, which will allow users to design a hardware architecture. Design of hardware architecture usualy starts with drawing of block diagrams of system which is being developed. Next step is to transcribe this drawn design into some hardware description language (HDL). Since structure of hardware design written in HDL is modular, i.e. similar to the structure of its block diagram, it's possible to translate block diagram of hardware design into HDL source code. The point of this idea is to get rid of designer's work on re-writing the block diagram into HDL language, as this can be automated. Designed plugin allows users to create block diagrams and new hardware components on different layers and switch between these layers interactively. Modul also implements the translation of drawn diagram into VHDL source code.
The goal of this thesis is to create a plugin for application Universal graphic editor, which will allow users to design a hardware architecture. Design of hardware architecture usualy starts with drawing of block diagrams of system which is being developed. Next step is to transcribe this drawn design into some hardware description language (HDL). Since structure of hardware design written in HDL is modular, i.e. similar to the structure of its block diagram, it's possible to translate block diagram of hardware design into HDL source code. The point of this idea is to get rid of designer's work on re-writing the block diagram into HDL language, as this can be automated. Designed plugin allows users to create block diagrams and new hardware components on different layers and switch between these layers interactively. Modul also implements the translation of drawn diagram into VHDL source code.
Description
Keywords
Univerzálny grafický editor, UGE, dynamicky linkované knižnice, zásuvný modul, graf, návrh hardware, kreslenie schém, HW komponenty, preklad schémy do kódu VHDL, Universal graphic editor, UGE, dynamic link libraries, plugin, graph, diagram, hardware design, diagram drawing, hardware components, diagram translation into VHDL source code
Citation
VARGA, L. Modelování HW designu v UGE [online]. Brno: Vysoké učení technické v Brně. Fakulta informačních technologií. 2007.
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cs
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Informační technologie
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2007-02-16
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práce byla úspěšně obhájena
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Standardní licenční smlouva - přístup k plnému textu bez omezení