High-Level Analogue Fault Simulation Using Linear and Non-Linear Models

Abstract

A novel method for analogue high-level fault simulation (HLFS) using linear and non-linear high-level fault models is presented. Our approach uses automated fault model synthesis and automated model selection for fault simulation. A speed up compared with transistor-level fault simulation can be achieved, whilst retaining both behavioural and fault coverage accuracy. The suggested method was verified in detail using short faults in a 10k state variable bandpass filter.