The Effects of Interference Suppression by a Reconfigurable Structure at DSSS-DPSK Receiver

Abstract

In this paper we show the performances of DSSS-DPSK receiver where the interference rejection circuit is reconfigurable and is using ξ-structure. The results will be shown for the case of packet, as well as for the continuous QPSK interference. The results show that the proposed reconfiguration circuit, in case of packet QPSK interference, significantly decreases the error probability, compared to the system using only ξ-structure. Also, in case of continuous interference, the reconfigurable structure has equally good performance, regardless of interference power and its bitrate.