Remote Control and Testing of the Interactive TV-Decoder

Abstract

The article deals with assembling and application of a complex sequential circuit VHDL (VHSIC (Very High-Speed Integrated Circuit) Hardware Description Language) model. The circuit model is a core of a cryptographic device for the signal encoding and decoding of discreet transmissions by TV-cable net. The cryptographic algorithm is changable according to the user's wishes. The principles of creation and example implementations are presented in the article. The behavioural model is used to minimize mistakes in the ASICs (Application Specific Integrated Circuits). The circuit implementation uses the FPGA (Field Programmable Gate Array) technology. The diagnostics of the circuit is based on remote testing by the IEEE Std 1149.1-1990. The VHDL model of diagnostic subsystem is created as an orthogonal model in relation to the cryptographic circuit VHDL model.