2013/3

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    A Novel (DDCC-SFG)-Based Systematic Design Technique of Active Filters
    (Společnost pro radioelektronické inženýrství, 2013-09) Fakhfakh, Mourad; Pierzchala, Marian
    This paper proposes a novel idea for the synthesis of active filters that is based on the use of signal-flow graph (SFG) stamps of differential difference current conveyors (DDCCs). On the basis of an RLC passive network or a filter symbolic transfer function, an equivalent SFG is constructed. DDCCs’ SFGs are identified inside the constructed ‘active’ graph, and thus the equivalent circuit can be easily synthesized. We show that the DDCC and its ‘derivatives’, i.e. differential voltage current conveyors and the conventional current conveyors, are the main basic building blocks in such design. The practicability of the proposed technique is showcased via three application examples. Spice simulations are given to show the viability of the proposed technique.
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    A Powerful Optimization Tool for Analog Integrated Circuits Design
    (Společnost pro radioelektronické inženýrství, 2013-09) Kubar, Miloslav; Jakovenko, Jiri
    This paper presents a new optimization tool for analog circuit design. Proposed tool is based on the robust version of the differential evolution optimization method. Corners of technology, temperature, voltage and current supplies are taken into account during the optimization. That ensures robust resulting circuits. Those circuits usually do not need any schematic change and are ready for the layout.. The newly developed tool is implemented directly to the Cadence design environment to achieve very short setup time of the optimization task. The design automation procedure was enhanced by optimization watchdog feature. It was created to control optimization progress and moreover to reduce the search space to produce better design in shorter time. The optimization algorithm presented in this paper was successfully tested on several design examples.
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    Ultra Low-Power Analog Median Filters
    (Společnost pro radioelektronické inženýrství, 2013-09) Diaz-Sanchez, Alejandro; Lemus-Lopez, Javier; Rocha Perez, Jose Miguel; Ramirez-Angulo, Jaime; Molinar Solis, Jesus Ezequiel; Vazquez-Leal, Hector
    The design and implementation of three analog median filter topologies, whose transistors operate in the deep weak-inversion region, is described. The first topology is a differential pairs array, in which drain currents are driven into two nodes in a differential fashion, while the second topology is based on a wide range OTA, which is used to maximize the dynamic range. Finally, the third topology uses three range-extended OTAs. The proposed weak-inversion filters were designed and fabricated in ON Semiconductor 0.5 micrometer technology through MOSIS. Experimental results of three-input fabricated prototypes for all three topologies are show, where power consumptions of 90nW in the first case, and 270nW in the other two cases can be noticed. A dual power supply +/-1.5 Volts were used.
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    A Novel Electronically Controllable of Current-mode Level Shifted Multicarrier PWM Based on MO-CFTA
    (Společnost pro radioelektronické inženýrství, 2013-09) Kongnun, Weerapon; Aurasopon, Apinan
    This paper proposes the application of an electronically controlled current-mode for a level shifted multicarrier PWM generator. The proposed circuit consists of two multiple-output current follower transconductance amplifiers (MO-CFTAs) for the multiple-output triangular generator and four current follower transconductance amplifiers (CFTAs) for the signal comparator. The characteristics of the circuit are as follows: the current output can be controlled by bias current, the maximum amplitude deviation due to temperature variation is less than 1.37% and the power consumption is approximately 0.744 microwatt, at ±1.5V supply voltages. The proposed PWM has been verified through PSpice simulation results which are in consistent with the theoretical analysis.
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    Novel Resistorless Mixed-Mode PID Controller with Improved Low-Frequency Performance
    (Společnost pro radioelektronické inženýrství, 2013-09) Silaruam, Vinai; Lorsawatsiri, Anuree; Wongtaychatham, Chariya
    This paper introduces a new resistorless mixed-mode proportional-integral-derivative (PID) controller. It employs six simple transconductors and only two grounded capacitors. The proposed PID controller offers several advantageous features of resistorless configuration, use of grounded capacitors, independent electronic-tuning characteristic of its parameters, and mixed-mode operation such as current, transimpedance, transadmittance, and voltage modes. The parasitic element effects of the transconductors on the proposed controller are investigated and the improved low-frequency performance of the proposed controller is then discussed. As applications, the proposed controller is demonstrated on two closed-loop systems. The PSPICE simulations with TSMC 0.18µm CMOS process and ±0.9V supply voltage verify the theoretical analysis.