System Settings

Environment Settings
Environment Variable | xst | ngdbuild | map | par
PATHEXT | .COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC | .COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC | < data not available > | < data not available >
Path | E:\Xilinx\ISE_DS\ISE\\lib\nt; E:\Xilinx\ISE_DS\ISE\\bin\nt; E:\Xilinx\ISE_DS\PlanAhead\bin; E:\Xilinx\ISE_DS\ISE\bin\nt; E:\Xilinx\ISE_DS\ISE\lib\nt; E:\Xilinx\ISE_DS\EDK\bin\nt; E:\Xilinx\ISE_DS\EDK\lib\nt; E:\Xilinx\ISE_DS\EDK\gnu\microblaze\nt\bin; E:\Xilinx\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; E:\Xilinx\ISE_DS\EDK\gnuwin\bin; E:\Xilinx\ISE_DS\common\bin\nt; E:\Xilinx\ISE_DS\common\lib\nt; C:\Program Files\NVIDIA Corporation\PhysX\Common; C:\Program Files\AMD APP\bin\x86; C:\Program Files\Common Files\Microsoft Shared\Windows Live; C:\Program Files\Microchip\MPLAB C30\bin; C:\PROGRA~1\Borland\CBUILD~1\Bin; C:\PROGRA~1\Borland\CBUILD~1\Projects\Bpl; C:\WinAVR-20100110\bin; C:\WinAVR-20100110\utils\bin; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\ATI Technologies\ATI.ACE\Core-Static; C:\Program Files\MATLAB\R2009b\runtime\win32; C:\Program Files\MATLAB\R2009b\bin; C:\OrCAD\OrCAD_10.0\tools\pcb\bin; C:\OrCAD\OrCAD_10.0\tools\specctra\bin; C:\OrCAD\OrCAD_10.0\tools\bin; C:\OrCAD\OrCAD_10.0\tools\PSpice\Library; C:\OrCAD\OrCAD_10.0\tools\fet\bin; C:\OrCAD\OrCAD_10.0\tools\jre\bin; C:\OrCAD\OrCAD_10.0\tools\Capture; C:\OrCAD\OrCAD_10.0\tools\PSpice; C:\OrCAD\OrCAD_10.0\OpenAccess\bin\win32\opt; C:\Program Files\Common Files\Adobe\AGL; C:\Program Files\Microchip\MPLAB C32 Suite\bin; C:\Program Files\Common Files\Acronis\SnapAPI\; C:\Program Files\Windows Live\Shared; C:\Program Files\Microsoft SQL Server\100\Tools\Binn\; C:\Program Files\Microsoft SQL Server\100\DTS\Binn\; C:\CooCox\CoIDE\gcc\bin; C:\Program Files\GNU Tools ARM Embedded\4.7 2013q1\bin | E:\Xilinx\ISE_DS\ISE\\lib\nt; E:\Xilinx\ISE_DS\ISE\\bin\nt; E:\Xilinx\ISE_DS\PlanAhead\bin; E:\Xilinx\ISE_DS\ISE\bin\nt; E:\Xilinx\ISE_DS\ISE\lib\nt; E:\Xilinx\ISE_DS\EDK\bin\nt; E:\Xilinx\ISE_DS\EDK\lib\nt; E:\Xilinx\ISE_DS\EDK\gnu\microblaze\nt\bin; E:\Xilinx\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; E:\Xilinx\ISE_DS\EDK\gnuwin\bin; E:\Xilinx\ISE_DS\common\bin\nt; E:\Xilinx\ISE_DS\common\lib\nt; C:\Program Files\NVIDIA Corporation\PhysX\Common; C:\Program Files\AMD APP\bin\x86; C:\Program Files\Common Files\Microsoft Shared\Windows Live; C:\Program Files\Microchip\MPLAB C30\bin; C:\PROGRA~1\Borland\CBUILD~1\Bin; C:\PROGRA~1\Borland\CBUILD~1\Projects\Bpl; C:\WinAVR-20100110\bin; C:\WinAVR-20100110\utils\bin; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files\ATI Technologies\ATI.ACE\Core-Static; C:\Program Files\MATLAB\R2009b\runtime\win32; C:\Program Files\MATLAB\R2009b\bin; C:\OrCAD\OrCAD_10.0\tools\pcb\bin; C:\OrCAD\OrCAD_10.0\tools\specctra\bin; C:\OrCAD\OrCAD_10.0\tools\bin; C:\OrCAD\OrCAD_10.0\tools\PSpice\Library; C:\OrCAD\OrCAD_10.0\tools\fet\bin; C:\OrCAD\OrCAD_10.0\tools\jre\bin; C:\OrCAD\OrCAD_10.0\tools\Capture; C:\OrCAD\OrCAD_10.0\tools\PSpice; C:\OrCAD\OrCAD_10.0\OpenAccess\bin\win32\opt; C:\Program Files\Common Files\Adobe\AGL; C:\Program Files\Microchip\MPLAB C32 Suite\bin; C:\Program Files\Common Files\Acronis\SnapAPI\; C:\Program Files\Windows Live\Shared; C:\Program Files\Microsoft SQL Server\100\Tools\Binn\; C:\Program Files\Microsoft SQL Server\100\DTS\Binn\; C:\CooCox\CoIDE\gcc\bin; C:\Program Files\GNU Tools ARM Embedded\4.7 2013q1\bin | < data not available > | < data not available >
XILINX | E:\Xilinx\ISE_DS\ISE\ | E:\Xilinx\ISE_DS\ISE\ | < data not available > | < data not available >
XILINXD_LICENSE_FILE | 2100@pc-avg.urel.feec.vutbr.cz | 2100@pc-avg.urel.feec.vutbr.cz | < data not available > | < data not available >
XILINX_DSP | E:\Xilinx\ISE_DS\ISE | E:\Xilinx\ISE_DS\ISE | < data not available > | < data not available >
XILINX_EDK | E:\Xilinx\ISE_DS\EDK | E:\Xilinx\ISE_DS\EDK | < data not available > | < data not available >
XILINX_PLANAHEAD | E:\Xilinx\ISE_DS\PlanAhead | E:\Xilinx\ISE_DS\PlanAhead | < data not available > | < data not available >

Synthesis Property Settings
Switch Name | Property Name | Value | Default Value
-ifn |  | Clock_management.prj |
-ifmt |  | mixed | MIXED
-ofn |  | Clock_management |
-ofmt |  | NGC | NGC
-p |  | xc3s250e-4-tq144 |
-top |  | Clock_management |
-opt_mode | Optimization Goal | Speed | SPEED
-opt_level | Optimization Effort | 1 | 1
-iuc | Use synthesis Constraints File | NO | NO
-keep_hierarchy | Keep Hierarchy | No | NO
-netlist_hierarchy | Netlist Hierarchy | As_Optimized | as_optimized
-rtlview | Generate RTL Schematic | Yes | NO
-glob_opt | Global Optimization Goal | Max_Delay | ALLCLOCKNETS
-read_cores | Read Cores | YES | YES
-sd | Cores Search Directories | {"ipcore_dir" } |
-write_timing_constraints | Write Timing Constraints | NO | NO
-cross_clock_analysis | Cross Clock Analysis | NO | NO
-bus_delimiter | Bus Delimiter | <> | <>
-slice_utilization_ratio | Slice Utilization Ratio | 100 | 100%
-bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100%
-verilog2001 | Verilog 2001 | YES | YES
-fsm_extract |  | YES | YES
-fsm_encoding |  | Auto | AUTO
-safe_implementation |  | No | NO
-fsm_style |  | LUT | LUT
-ram_extract |  | Yes | YES
-ram_style |  | Auto | AUTO
-rom_extract |  | Yes | YES
-shreg_extract |  | YES | YES
-rom_style |  | Auto | AUTO
-auto_bram_packing |  | NO | NO
-resource_sharing |  | YES | YES
-async_to_sync |  | NO | NO
-mult_style |  | Auto | AUTO
-iobuf |  | YES | YES
-max_fanout |  | 500 | 500
-bufg |  | 24 | 24
-register_duplication |  | YES | YES
-register_balancing |  | No | NO
-optimize_primitives |  | NO | NO
-use_clock_enable |  | Yes | YES
-use_sync_set |  | Yes | YES
-use_sync_reset |  | Yes | YES
-iob |  | Auto | AUTO
-equivalent_register_removal |  | YES | YES
-slice_utilization_ratio_maxmargin |  | 5 | 0%

Translation Property Settings
Switch Name | Property Name | Value | Default Value
-intstyle |  | ise | None
-dd |  | _ngo | None
-p |  | xc3s250e-tq144-4 | None
-sd | Macro Search Path | ipcore_dir | None
-uc |  | fpga_master.ucf | None

Operating System Information
Operating System Information | xst | ngdbuild | map | par
CPU Architecture/Speed | Intel(R) Core(TM)2 Quad CPU Q8200 @ 2.33GHz/2333 MHz | Intel(R) Core(TM)2 Quad CPU Q8200 @ 2.33GHz/2333 MHz | < data not available > | < data not available >
Host | A03-0541B | A03-0541B | < data not available > | < data not available >
OS Name | Microsoft Windows 7 , 32-bit | Microsoft Windows 7 , 32-bit | < data not available > | < data not available >
OS Release | Service Pack 1 (build 7601) | Service Pack 1 (build 7601) | < data not available > | < data not available >