-- Company: BUSE
-- ENgineer: PAVEL SUNKA
-- 
-- Create Date:   26.3.2017
-- Module Name:   RGB_driver 
-- Project Name:  RGB PANEL
-- Target Devices: 10M08
-----------------------------         ----------------------------
-- Description: RGB driver -------- chybna adresace------
-----------------------------         ----------------------------
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_signed.all;
--	use IEEE.std_logic_signed.all;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
use IEEE.NUMERIC_STD.ALL;

--use IEEE.math_real.all;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity rgb_mux is
	Port(
		ARST   : in  STD_LOGIC;
		CLK    : in  std_logic;
		RGB1_I : in  std_logic_vector(17 downto 0);
		RGB2_I : in  std_logic_vector(17 downto 0);
		SEL    : in  std_logic_vector(5 downto 0);
		RGB1_O : out std_logic_vector(2 downto 0);
		RGB2_O : out std_logic_vector(2 downto 0)
	);

end rgb_mux;

architecture Behavioral of rgb_mux is
	
begin
	mux : process(CLK) is
	begin
		if rising_edge(CLK) then

			case SEL is
				when "000001" =>
					RGB1_O <= RGB1_I(12) & RGB1_I(6) & RGB1_I(0);
					RGB2_O <= RGB2_I(12) & RGB2_I(6) & RGB2_I(0);
				when "000010" =>
					RGB1_O <= RGB1_I(13) & RGB1_I(7) & RGB1_I(1);
					RGB2_O <= RGB2_I(13) & RGB2_I(7) & RGB2_I(1);
				when "000100" =>
					RGB1_O <= RGB1_I(14) & RGB1_I(8) & RGB1_I(2);
					RGB2_O <= RGB2_I(14) & RGB2_I(8) & RGB2_I(2);
				when "001000" =>
					RGB1_O <= RGB1_I(15) & RGB1_I(9) & RGB1_I(3);
					RGB2_O <= RGB2_I(15) & RGB2_I(9) & RGB2_I(3);
				when "010000" =>
					RGB1_O <= RGB1_I(16) & RGB1_I(10) & RGB1_I(4);
					RGB2_O <= RGB2_I(16) & RGB2_I(10) & RGB2_I(4);
				when "100000" =>
					RGB1_O <= RGB1_I(17) & RGB1_I(11) & RGB1_I(5);
					RGB2_O <= RGB2_I(17) & RGB2_I(11) & RGB2_I(5);
				when others => null;
			end case;
		end if;
	end process mux;

end Behavioral;

