
State Machine - |top|communication:uCommunication|Micomp_top:uMicomp|state
Name state.sResp state.sRight state.sWait state.sCmd state.s08 state.s09 
state.s09 0 0 0 0 0 0 
state.s08 0 0 0 0 1 1 
state.sCmd 0 0 0 1 0 1 
state.sWait 0 0 1 0 0 1 
state.sRight 0 1 0 0 0 1 
state.sResp 1 0 0 0 0 1 

State Machine - |top|communication:uCommunication|Micomp_top:uMicomp|Micomp:uMicomp|state_o
Name state_o.sCRC_o state_o.sData_o state_o.sSize_o state_o.sWait_o 
state_o.sWait_o 0 0 0 0 
state_o.sSize_o 0 0 1 1 
state_o.sData_o 0 1 0 1 
state_o.sCRC_o 1 0 0 1 

State Machine - |top|communication:uCommunication|Micomp_top:uMicomp|Micomp:uMicomp|state_i
Name state_i.sResult state_i.sCrc state_i.sData state_i.sSize 
state_i.sSize 0 0 0 0 
state_i.sData 0 0 1 1 
state_i.sCrc 0 1 0 1 
state_i.sResult 1 0 0 1 

State Machine - |top|communication:uCommunication|Micomp_top:uMicomp|Micomp:uMicomp|Uart:uUart|state
Name state.sSync state.sPulse state.sData state.sRst state.s0 
state.s0 0 0 0 0 0 
state.sRst 0 0 0 1 1 
state.sData 0 0 1 0 1 
state.sPulse 0 1 0 0 1 
state.sSync 1 0 0 0 1 
