#ifndef FUNKCE_ANALYZATOR_H_INCLUDED
#define FUNKCE_ANALYZATOR_H_INCLUDED

#define SPI3_SCK    PC10
#define SPI3_MISO   PC11
#define SPI3_MOSI   PC12

#define JTAG_TDI    PD0
#define JTAG_TMS    PD1
#define JTAG_TDO    PB8
#define JTAG_TCK    PB9
#define DONE        PD2

#define pamet_pulka     FPGA1
#define procesor_RDY    FPGA2   //vystup
#define FPGA_prevod     FPGA3
#define pamet_prazdna   FPGA4


void JTAG_inicializace (void);
void JTAG_odpojeni(void);
void SPI3_inicializace(void);
void PHY_INTRP_RST_inicializace(void);
void rizeni_FPGA_inicializace (void);


#endif // FUNKCE_ANALYZATOR_H_INCLUDED


