/*
** ###################################################################
**     This code is generated by the Device Initialization Tool.
**     It is overwritten during code generation.
**     USER MODIFICATION ARE PRESERVED ONLY INSIDE INTERRUPT SERVICE ROUTINES
**     OR EXPLICITLY MARKED SECTIONS
**
**     Project   : Ridici_MCU
**     Processor : MC9S08AW48CFU
**     Version   : Component 01.138, Driver 01.06, CPU db: 2.87.209
**     Datasheet : MC9S08AW60 Rev 2 12/2006
**     Date/Time : 27.2.2010, 19:56
**     Abstract  :
**         This module contains device initialization code 
**         for selected on-chip peripherals.
**     Contents  :
**         Function "MCU_init" initializes selected peripherals
**
**     Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
** ###################################################################
*/

/* MODULE MCUinit */

#include <MC9S08AW60.h>                /* I/O map for MC9S08AW48CFU */
#include "MCUinit.h"

/* User declarations and definitions */
/*   Code, declarations and definitions here will be preserved during code generation */
/* End of user declarations and definitions */


/*
** ===================================================================
**     Method      :  MCU_init (component MC9S08AW60_64)
**
**     Description :
**         Device initialization code for selected peripherals.
** ===================================================================
*/
void MCU_init(void)
{
  /* ### MC9S08AW60_64 "Cpu" init code ... */
  /*  PE initialization code after reset */

  /* Common initialization of the write once registers */
  /* SOPT: COPE=1,COPT=1,STOPE=0 */
  SOPT = 0xD3;                                      
  /* SPMSC1: LVDF=0,LVDACK=0,LVDIE=0,LVDRE=1,LVDSE=1,LVDE=1,BGBE=0 */
  SPMSC1 = 0x1C;                                      
  /* SPMSC2: LVWF=0,LVWACK=0,LVDV=0,LVWV=0,PPDF=0,PPDACK=0,PPDC=0 */
  SPMSC2 = 0x00;                                      
  /* SMCLK: MPE=0,MCSEL=0 */
  SMCLK &= (unsigned char)~0x17;                     
  /*  System clock initialization */
  /* ICGC1: HGO=0,RANGE=1,REFS=0,CLKS1=1,CLKS0=0,OSCSTEN=1,LOCD=0 */
  ICGC1 = 0x54;                                      
  /* ICGC2: LOLRE=0,MFD2=0,MFD1=0,MFD0=0,LOCRE=0,RFD2=0,RFD1=0,RFD0=0 */
  ICGC2 = 0x00;                                      
  if (*(unsigned char*far)0xFFBE != 0xFF) { /* Test if the device trim value is stored on the specified address */
    ICGTRM = *(unsigned char*far)0xFFBE; /* Initialize ICGTRM register from a non volatile memory */
  }
  while(!ICGS1_ERCS) {                 /* Wait until external reference is not stable */
  }
  /* Common initialization of the CPU registers */
  /* PTASE: PTASE7=1,PTASE6=1,PTASE5=1,PTASE4=1,PTASE3=1,PTASE2=1,PTASE1=1,PTASE0=1 */
  PTASE = 0xFF;                                      
  /* PTBSE: PTBSE7=1,PTBSE6=1,PTBSE5=1,PTBSE4=1,PTBSE3=1,PTBSE2=1,PTBSE1=1,PTBSE0=1 */
  PTBSE = 0xFF;                                      
  /* PTCSE: PTCSE6=1,PTCSE5=1,PTCSE4=1,PTCSE3=1,PTCSE2=1,PTCSE1=1,PTCSE0=1 */
  PTCSE |= (unsigned char)0x7F;                      
  /* PTDSE: PTDSE7=1,PTDSE6=1,PTDSE5=1,PTDSE4=1,PTDSE3=1,PTDSE2=1,PTDSE1=1,PTDSE0=1 */
  PTDSE = 0xFF;                                      
  /* PTESE: PTESE7=1,PTESE6=1,PTESE5=1,PTESE4=1,PTESE3=1,PTESE2=1,PTESE1=1,PTESE0=1 */
  PTESE = 0xFF;                                      
  /* PTFSE: PTFSE7=1,PTFSE6=1,PTFSE5=1,PTFSE4=1,PTFSE3=1,PTFSE2=1,PTFSE1=1,PTFSE0=1 */
  PTFSE = 0xFF;                                      
  /* PTGSE: PTGSE6=1,PTGSE5=1,PTGSE4=1,PTGSE3=1,PTGSE2=1,PTGSE1=1,PTGSE0=1 */
  PTGSE |= (unsigned char)0x7F;                      
  /* PTADS: PTADS7=0,PTADS6=0,PTADS5=0,PTADS4=0,PTADS3=0,PTADS2=0,PTADS1=0,PTADS0=0 */
  PTADS = 0x00;                                      
  /* PTBDS: PTBDS7=0,PTBDS6=0,PTBDS5=0,PTBDS4=0,PTBDS3=0,PTBDS2=0,PTBDS1=0,PTBDS0=0 */
  PTBDS = 0x00;                                      
  /* PTCDS: PTCDS6=0,PTCDS5=0,PTCDS4=0,PTCDS3=0,PTCDS2=0,PTCDS1=0,PTCDS0=0 */
  PTCDS = 0x00;                                      
  /* PTDDS: PTDDS7=0,PTDDS6=0,PTDDS5=0,PTDDS4=0,PTDDS3=0,PTDDS2=0,PTDDS1=0,PTDDS0=0 */
  PTDDS = 0x00;                                      
  /* PTEDS: PTEDS7=0,PTEDS6=0,PTEDS5=0,PTEDS4=0,PTEDS3=0,PTEDS2=0,PTEDS1=0,PTEDS0=0 */
  PTEDS = 0x00;                                      
  /* PTFDS: PTFDS7=0,PTFDS6=0,PTFDS5=0,PTFDS4=0,PTFDS3=0,PTFDS2=0,PTFDS1=0,PTFDS0=0 */
  PTFDS = 0x00;                                      
  /* PTGDS: PTGDS6=0,PTGDS5=0,PTGDS4=0,PTGDS3=0,PTGDS2=0,PTGDS1=0,PTGDS0=0 */
  PTGDS = 0x00;                                      
  /* ### Init_GPIO init code */
  /* PTBDD: PTBDD7=0,PTBDD6=0,PTBDD5=0,PTBDD4=0,PTBDD3=1,PTBDD2=1,PTBDD1=1,PTBDD0=1 */
  PTBDD = 0x0F;                                      
  /* ### Init_GPIO init code */
  /* PTGPE: PTGPE1=0,PTGPE0=1 */
  PTGPE = (PTGPE & (unsigned char)~0x02) | (unsigned char)0x01;
  /* PTGDD: PTGDD1=1,PTGDD0=1 */
  PTGDD |= (unsigned char)0x03;                      
  /* ### Init_TPM init code */
  /* TPM1SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
  TPM1SC = 0x00;                       /* Stop and reset counter */
  TPM1MOD = 0x03E7U;                   /* Period value setting */
  (void)(TPM1SC == 0);                 /* Overflow int. flag clearing (first part) */
  /* TPM1SC: TOF=0,TOIE=1,CPWMS=0,CLKSB=0,CLKSA=1,PS2=0,PS1=0,PS0=0 */
  TPM1SC = 0x48;                       /* Int. flag clearing (2nd part) and timer control register setting */
  /* ### Init_TPM init code */
  /* TPM2SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
  TPM2SC = 0x00;                       /* Stop and reset counter */
  TPM2MOD = 0x4EU;                     /* Period value setting */
  (void)(TPM2SC == 0);                 /* Overflow int. flag clearing (first part) */
  /* TPM2SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=1,PS2=1,PS1=1,PS0=1 */
  TPM2SC = 0x0F;                       /* Int. flag clearing (2nd part) and timer control register setting */
  /* ### Init_GPIO init code */
  /* PTDDD: PTDDD4=0,PTDDD2=1,PTDDD1=0,PTDDD0=1 */
  PTDDD = (PTDDD & (unsigned char)~0x12) | (unsigned char)0x05;
  /* ### Init_IRQ init code */
  /* ** Initialize pin IRQ ** */
  /* IRQSC: IRQIE=0 */
  IRQSC &= (unsigned char)~0x02;       /* Disable IRQ Interrupt */
  /* IRQSC: IRQPE=1 */
  IRQSC |= (unsigned char)0x10;                      
  /* IRQSC: IRQACK=1 */
  IRQSC |= (unsigned char)0x04;                      
  /* ### Init_RTI init code */
  /* SRTISC: RTIF=0,RTIACK=1,RTICLKS=0,RTIE=1,RTIS2=0,RTIS1=0,RTIS0=0 */
  SRTISC = 0x50;                                      
  /* ### Init_COP init code */
  SRS = 0xFF;                          /* Clear WatchDog counter */
  /* ### */
  asm CLI;                             /* Enable interrupts */
} /*MCU_init*/


/*
** ===================================================================
**     Interrupt handler : isrVrti
**
**     Description :
**         User interrupt service routine. 
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*__interrupt void isrVrti(void)
{
 
  chybove_pocitadlo ++;
  if (chybove_pocitadlo==3)
  while (1);
  else 
  __RESET_WATCHDOG();
  
}
 end of isrVrti */


/*
** ===================================================================
**     Interrupt handler : isrVtpm2ovf
**
**     Description :
**         User interrupt service routine. 
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
__interrupt void isrVtpm2ovf(void)
{
  /* Write your interrupt code here ... */

}
/* end of isrVtpm2ovf */


/*
** ===================================================================
**     Interrupt handler : isrVtpm1ovf
**
**     Description :
**         User interrupt service routine. 
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
__interrupt void isrVtpm1ovf(void)
{
  /* Write your interrupt code here ... */

}
/* end of isrVtpm1ovf */


/*
** ===================================================================
**     Interrupt handler : isrVicg
**
**     Description :
**         User interrupt service routine. 
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
__interrupt void isrVicg(void)
{
  /* Write your interrupt code here ... */

}
/* end of isrVicg */


/*
** ===================================================================
**     Interrupt handler : isrVirq
**
**     Description :
**         User interrupt service routine. 
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*__interrupt void isrVirq(void)
{
  // v obsluze načíst teplotu, ,vteřiny a minuty, vypočítat dávku a zapsat je na displej
    
    while(1)  {                                       
    IIC1C_MST = 1;              // MASTER mód - generování START
    IIC1C_TX = 0;               // RECIEVE mód 
    IIC1D  =0b10010001;         // zapsání adresy LM32 do datového registru + osmý vyslaný bit je R/W - nevím, jestli se to dělá automaticky - otestovat reálně
    while (!IIC1S_TCF);         // počkání na odeslání adresy
    for (j=5;j>0;j--);          // zpoždění aby stačíl SLAVE (respektive IIC je pomalejší, než procesor) poslat ACK nebo NACK
      if (!IIC1S_RXAK){         // pokud byl přijat ACK od SLAVE
        IIC1C_TXAK  = 0;     //povolení generování ACK
        RD_data = IIC1D;     //dummy read
        while (!IIC1S_TCF);
        RD_data = IIC1D;    //platná data
        RD_data = RD_data<<8;
        IIC1C_TXAK  = 1;    //zakázání ACK
        while (!IIC1S_TCF); 
        IIC1C_MST = 0;      //generování stop
        RD_data = IIC1D;    //platná data
              
              }
            }
      }
      for (j=5;j>0;j--);
    }    

}  */
/* end of isrVirq */



/* Initialization of the CPU registers in FLASH */

/* NVPROT: FPS7=1,FPS6=1,FPS5=1,FPS4=1,FPS3=1,FPS2=1,FPS1=1,FPDIS=1 */
const unsigned char NVPROT_INIT @0x0000FFBD = 0xFF;

/* NVOPT: KEYEN=0,FNORED=1,SEC01=1,SEC00=0 */
const unsigned char NVOPT_INIT @0x0000FFBF = 0x7E;



extern near void _Startup(void);

/* Interrupt vector table */
#ifndef UNASSIGNED_ISR
  #define UNASSIGNED_ISR ((void(*near const)(void)) 0xFFFF) /* unassigned interrupt service routine */
#endif

void (* near const _vect[])(void) @0xFFCC = { /* Interrupt vector table */
         isrVrti,                      /* Int.no. 25 Vrti (at FFCC)                  Used */
         UNASSIGNED_ISR,               /* Int.no. 24 Viic1 (at FFCE)                 Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 23 Vadc1 (at FFD0)                 Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 22 Vkeyboard1 (at FFD2)            Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 21 Vsci2tx (at FFD4)               Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 20 Vsci2rx (at FFD6)               Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 19 Vsci2err (at FFD8)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 18 Vsci1tx (at FFDA)               Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 17 Vsci1rx (at FFDC)               Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 16 Vsci1err (at FFDE)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 15 Vspi1 (at FFE0)                 Unassigned */
         isrVtpm2ovf,                  /* Int.no. 14 Vtpm2ovf (at FFE2)              Used */
         UNASSIGNED_ISR,               /* Int.no. 13 Vtpm2ch1 (at FFE4)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 12 Vtpm2ch0 (at FFE6)              Unassigned */
         isrVtpm1ovf,                  /* Int.no. 11 Vtpm1ovf (at FFE8)              Used */
         UNASSIGNED_ISR,               /* Int.no. 10 Vtpm1ch5 (at FFEA)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  9 Vtpm1ch4 (at FFEC)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  8 Vtpm1ch3 (at FFEE)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  7 Vtpm1ch2 (at FFF0)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  6 Vtpm1ch1 (at FFF2)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  5 Vtpm1ch0 (at FFF4)              Unassigned */
         isrVicg,                      /* Int.no.  4 Vicg (at FFF6)                  Used */
         UNASSIGNED_ISR,               /* Int.no.  3 Vlvd (at FFF8)                  Unassigned */
         isrVirq,                      /* Int.no.  2 Virq (at FFFA)                  Used */
         UNASSIGNED_ISR,               /* Int.no.  1 Vswi (at FFFC)                  Unassigned */
         _Startup                      /* Int.no.  0 Vreset (at FFFE)                Reset vector */
};




/* END MCUinit */

/*
** ###################################################################
**
**     This file was created by Processor Expert 3.07 [04.34]
**     for the Freescale HCS08 series of microcontrollers.
**
** ###################################################################
*/
