/** ###################################################################
**     THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Cpu.C
**     Project   : Generator
**     Processor : MC9S08GT16ACFB
**     Component : MC9S08GT16A_44
**     Version   : Component 01.095, Driver 01.35, CPU db: 2.87.091
**     Datasheet : MC9S08GT16A Rev. 2, Draft A 10/2006
**     Compiler  : CodeWarrior HCS08 C Compiler
**     Date/Time : 20.5.2010, 20:10
**     Abstract  :
**         This bean "MC9S08GT16A_44" contains initialization of the
**         CPU and provides basic methods and events for CPU core
**         settings.
**     Settings  :
**
**     Contents  :
**         EnableInt  - void Cpu_EnableInt(void);
**         DisableInt - void Cpu_DisableInt(void);
**         Delay100US - void Cpu_Delay100US(word us100);
**
**     Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
** ###################################################################*/

/* MODULE Cpu. */

#pragma MESSAGE DISABLE C4002 /* WARNING C4002: Result not used is ignored */

#include "Potvrzreni_in.h"
#include "Potvrzeni_out.h"
#include "Vystupni_port.h"
#include "Frekvence_filtr.h"
#include "DAC_ILE.h"
#include "EI2C2.h"
#include "Inhr3.h"
#include "Inhr4.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Events.h"
#include "Cpu.h"


/* Global variables */
volatile byte CCR_reg;                 /* Current CCR register */


/*
** ===================================================================
**     Method      :  Cpu_Interrupt (component MC9S08GT16A_44)
**
**     Description :
**         The method services unhandled interrupt vectors.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
ISR(Cpu_Interrupt)
{
  /* This code can be changed using the CPU bean property "Build Options / Unhandled int code" */
  asm(BGND);
}


/*
** ===================================================================
**     Method      :  Cpu_DisableInt (component MC9S08GT16A_44)
**
**     Description :
**         Disables maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_EnableInt (component MC9S08GT16A_44)
**
**     Description :
**         Enables maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_Delay100US (component MC9S08GT16A_44)
**
**     Description :
**         This method realizes software delay. The length of delay
**         is at least 100 microsecond multiply input parameter
**         [us100]. As the delay implementation is not based on real
**         clock, the delay time may be increased by interrupt
**         service routines processed during the delay. The method
**         is independent on selected speed mode.
**     Parameters  :
**         NAME            - DESCRIPTION
**         us100           - Number of 100 us delay repetitions.
**     Returns     : Nothing
** ===================================================================
*/
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma MESSAGE DISABLE C5703
void Cpu_Delay100US(word us100)
{
  /* Total irremovable overhead: 16 cycles */
  /* ldhx: 5 cycles overhead (load parameter into register) */
  /* jsr:  5 cycles overhead (jump to subroutine) */
  /* rts:  6 cycles overhead (return from subroutine) */

  /* aproximate irremovable overhead for each 100us cycle (counted) : 8 cycles */
  /* aix:  2 cycles overhead  */
  /* cphx: 3 cycles overhead  */
  /* bne:  3 cycles overhead  */
  /* Disable MISRA rule 19 checking - Octal constant used */
  /*lint -esym( 960, 19)   */
  /* Disable MISRA rule 55 checking - Non-case label used */
  /*lint -esym( 961, 55)   */
  asm {
loop:
    /* 100 us delay block begin */
    /*
     * Delay
     *   - requested                  : 100 us @ 10MHz,
     *   - possible                   : 1000 c, 100000 ns
     *   - without removable overhead : 992 c, 99200 ns
     */
    pshh                               /* (2 c: 200 ns) backup H */
    pshx                               /* (2 c: 200 ns) backup X */
    ldhx #$007A                        /* (3 c: 300 ns) number of iterations */
label0:
    aix #-1                            /* (2 c: 200 ns) decrement H:X */
    cphx #0                            /* (3 c: 300 ns) compare it to zero */
    bne label0                         /* (3 c: 300 ns) repeat 122x */
    pulx                               /* (3 c: 300 ns) restore X */
    pulh                               /* (3 c: 300 ns) restore H */
    nop                                /* (1 c: 100 ns) wait for 1 c */
    nop                                /* (1 c: 100 ns) wait for 1 c */
    nop                                /* (1 c: 100 ns) wait for 1 c */
    /* 100 us delay block end */
    aix #-1                            /* us100 parameter is passed via H:X registers */
    cphx #0
    bne loop                           /* next loop */
    rts                                /* return from subroutine */
  }
  /* Restore MISRA rule 19 checking - Octal constant used */
  /*lint +esym( 960, 19)   */
  /* Restore MISRA rule 55 checking - Non-case label used */
  /*lint +esym( 961, 55)   */
}

/*
** ===================================================================
**     Method      :  _EntryPoint (component MC9S08GT16A_44)
**
**     Description :
**         Initializes the whole system like timing and so on. At the end 
**         of this function, the C startup is invoked to initialize stack,
**         memory areas and so on.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void _Startup(void);            /* Forward declaration of external startup function declared in file Start12.c */

#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
  /* ### MC9S08GT16A_44 "Cpu" init code ... */
  /*  PE initialization code after reset */

  /* Common initialization of the write once registers */
  /* SOPT: COPE=0,COPT=1,STOPE=0,??=1,??=0,??=0,BKGDPE=1,??=1 */
  setReg8(SOPT, 0x53);                  
  /* SPMSC1: LVDF=0,LVDACK=0,LVDIE=0,LVDRE=1,LVDSE=1,LVDE=1,??=0,??=0 */
  setReg8(SPMSC1, 0x1C);                
  /* SPMSC2: LVWF=0,LVWACK=0,LVDV=0,LVWV=0,PPDF=0,PPDACK=0,PDC=0,PPDC=0 */
  setReg8(SPMSC2, 0x00);                
  /*  System clock initialization */
  /* ICGC1: HGO=0,RANGE=1,REFS=0,CLKS1=1,CLKS0=0,OSCSTEN=1,LOCD=0,??=0 */
  setReg8(ICGC1, 0x54);                 
  /* ICGC2: LOLRE=0,MFD2=0,MFD1=0,MFD0=0,LOCRE=1,RFD2=0,RFD1=0,RFD0=0 */
  setReg8(ICGC2, 0x08);                 
  if (*(unsigned char*)0xFFBE != 0xFF) { /* Test if the device trim value is stored on the specified address */
    ICGTRM = *(unsigned char*)0xFFBE;  /* Initialize ICGTRM register from a non volatile memory */
  }
  while(!ICGS1_ERCS) {                 /* Wait until external reference is not stable */
  }
  /*** End of PE initialization code after reset ***/
  __asm   jmp _Startup ;               /* Jump to C startup code */

}

/*
** ===================================================================
**     Method      :  PE_low_level_init (component MC9S08GT16A_44)
**
**     Description :
**         Initializes beans and provides common register initialization. 
**         The method is called automatically as a part of the 
**         application initialization code.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
  /* Common initialization of the CPU registers */
  /* PTBPE: PTBPE7=0,PTBPE6=0,PTBPE2=0 */
  clrReg8Bits(PTBPE, 0xC4);             
  /* PTBD: PTBD6=0,PTBD2=1 */
  clrSetReg8Bits(PTBD, 0x40, 0x04);     
  /* PTBDD: PTBDD7=0,PTBDD6=1,PTBDD2=1 */
  clrSetReg8Bits(PTBDD, 0x80, 0x44);    
  /* PTAD: PTAD7=0,PTAD6=0,PTAD5=0,PTAD4=0,PTAD3=0,PTAD2=0,PTAD1=0,PTAD0=0 */
  setReg8(PTAD, 0x00);                  
  /* PTAPE: PTAPE7=0,PTAPE6=0,PTAPE5=0,PTAPE4=0,PTAPE3=0,PTAPE2=0,PTAPE1=0,PTAPE0=0 */
  setReg8(PTAPE, 0x00);                 
  /* PTADD: PTADD7=1,PTADD6=1,PTADD5=1,PTADD4=1,PTADD3=1,PTADD2=1,PTADD1=1,PTADD0=1 */
  setReg8(PTADD, 0xFF);                 
  /* PTDD: PTDD3=0 */
  clrReg8Bits(PTDD, 0x08);              
  /* PTDDD: PTDDD3=1 */
  setReg8Bits(PTDDD, 0x08);             
  /* PTCD: PTCD3=1,PTCD2=1 */
  setReg8Bits(PTCD, 0x0C);              
  /* PTCPE: PTCPE3=1,PTCPE2=1 */
  setReg8Bits(PTCPE, 0x0C);             
  /* PTCDD: PTCDD3=0,PTCDD2=0 */
  clrReg8Bits(PTCDD, 0x0C);             
  /* PTASE: PTASE7=0,PTASE6=0,PTASE5=0,PTASE4=0,PTASE3=0,PTASE2=0,PTASE1=0,PTASE0=0 */
  setReg8(PTASE, 0x00);                 
  /* PTBSE: PTBSE7=0,PTBSE6=0,PTBSE5=0,PTBSE4=0,PTBSE3=0,PTBSE2=0,PTBSE1=0,PTBSE0=0 */
  setReg8(PTBSE, 0x00);                 
  /* PTCSE: PTCSE6=0,PTCSE5=0,PTCSE4=0,PTCSE3=0,PTCSE2=0,PTCSE1=0,PTCSE0=0 */
  clrReg8Bits(PTCSE, 0x7F);             
  /* PTDSE: PTDSE4=0,PTDSE3=0,PTDSE1=0,PTDSE0=0 */
  clrReg8Bits(PTDSE, 0x1B);             
  /* PTESE: PTESE5=0,PTESE4=0,PTESE3=0,PTESE2=0,PTESE1=0,PTESE0=0 */
  clrReg8Bits(PTESE, 0x3F);             
  /* PTGSE: PTGSE2=0,PTGSE1=0,PTGSE0=0 */
  clrReg8Bits(PTGSE, 0x07);             
  /* ### Shared modules init code ... */
  /* ### BitIO "Potvrzreni_in" init code ... */
  /* ### BitIO "Potvrzeni_out" init code ... */
  /* ### ByteIO "Vystupni_port" init code ... */
  /* ### TimerOut "Frekvence_filtr" init code ... */
  Frekvence_filtr_InitTO();
  /* ### BitIO "DAC_ILE" init code ... */
  /* ### BitIO "Inhr3" init code ... */
  /* ### BitIO "Inhr4" init code ... */
  /* ###  "EI2C2" init code ... */
  EI2C2_Init();
  __DI();                              /* Disable interrupts */
}

/* Initialization of the CPU registers in FLASH */

/* NVPROT: FPS=0x7F,FPDIS=1 */
const unsigned char NVPROT_INIT @0x0000FFBD = 0xFF;

/* NVOPT: KEYEN=0,FNORED=1,??=1,??=1,??=1,??=1,SEC01=1,SEC00=0 */
const unsigned char NVOPT_INIT @0x0000FFBF = 0x7E;

/* END Cpu. */

/*
** ###################################################################
**
**     This file was created by Processor Expert 3.07 [04.34]
**     for the Freescale HCS08 series of microcontrollers.
**
** ###################################################################
*/
