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-- Company: 
-- Engineer: David Makowka
-- 
-- Create Date: 11/11/2019 09:01:40 PM
-- Design Name: 
-- Module Name: transmitter_vhdl - Behavioral
-- Project Name: 
-- Target Devices: 
-- Tool Versions: 
-- Description: 
-- 
-- Dependencies: 
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
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library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity divider_with_increase is
   generic( bits                               : positive);
   port(    clk                                : in  std_logic;
            in_increase                        : in  std_logic_vector(bits-1 downto 0);
            out_pulse                          : out std_logic;
            --pulse out in particullar value of counter
            in_multiplier                      : in std_logic_vector(7 downto 0);
            out_percentage_pulse               : out std_logic --pulse that is triggered when in particullar percentage of counter
            );
end divider_with_increase;

architecture divider_with_increase_arch of divider_with_increase is

    signal s_counter                           : std_logic_vector (bits-1 downto 0) := (others=> '0');
    signal s_pulse_prev                        : std_logic := '0';
    

begin
    process (clk)
    begin
      if rising_edge(clk) then
        s_counter <= std_logic_vector(unsigned(s_counter) + unsigned(in_increase));
        
        s_pulse_prev <= s_counter(s_counter'high);
        
        --covers generating of out_pulse
        if (s_pulse_prev = '1' AND s_counter(s_counter'high) = '0') then --now when counter overflow
            out_pulse <= '1';
            out_percentage_pulse <= '1';
        else
            out_pulse <= '0';
        end if; 
        
        --covers generating of out_percentage_pulse            -- OLD COMMENT:--32768*to_integer(unsigned(in_multiplier)))) then --4210752
        if (to_integer(unsigned(s_counter)) >= 858993459) then --858993459 is 80 percent of counter - time to short phases for measurent 
            out_percentage_pulse <= '1';                       --966367641 is 90 percent of counter - time to short phases for measurent 
        else
            out_percentage_pulse <= '0';
        end if;
        
         
      end if;
    end process;
end divider_with_increase_arch;