# 
# Synthesis run script generated by Vivado
# 

set_msg_config -id {HDL 9-1061} -limit 100000
set_msg_config -id {HDL 9-1654} -limit 100000
create_project -in_memory -part xc7z020clg484-1

set_param project.compositeFile.enableAutoGeneration 0
set_param synth.vivado.isSynthRun true
set_msg_config -source 4 -id {IP_Flow 19-2162} -severity warning -new_severity info
set_property webtalk.parent_dir D:/Xilinx_projects/Motor_Control/Motor_Control.cache/wt [current_project]
set_property parent.project_path D:/Xilinx_projects/Motor_Control/Motor_Control.xpr [current_project]
set_property default_lib xil_defaultlib [current_project]
set_property target_language VHDL [current_project]
set_property board_part em.avnet.com:zed:part0:1.3 [current_project]
set_property ip_repo_paths {
  d:/xilinx_projects/ip_repo/control_signals_1.0
  d:/Xilinx_projects/ip_repo
} [current_project]
set_property vhdl_version vhdl_2k [current_fileset]
add_files D:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/Motor_Control.bd
set_property used_in_implementation false [get_files -all d:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/ip/Motor_Control_processing_system7_0_0/Motor_Control_processing_system7_0_0.xdc]
set_property used_in_implementation false [get_files -all d:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/ip/Motor_Control_rst_processing_system7_0_100M_0/Motor_Control_rst_processing_system7_0_100M_0_board.xdc]
set_property used_in_implementation false [get_files -all d:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/ip/Motor_Control_rst_processing_system7_0_100M_0/Motor_Control_rst_processing_system7_0_100M_0.xdc]
set_property used_in_implementation false [get_files -all d:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/ip/Motor_Control_rst_processing_system7_0_100M_0/Motor_Control_rst_processing_system7_0_100M_0_ooc.xdc]
set_property used_in_implementation false [get_files -all d:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/ip/Motor_Control_xbar_0/Motor_Control_xbar_0_ooc.xdc]
set_property used_in_implementation false [get_files -all d:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/ip/Motor_Control_auto_pc_0/Motor_Control_auto_pc_0_ooc.xdc]
set_property used_in_implementation false [get_files -all D:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/Motor_Control_ooc.xdc]
set_property is_locked true [get_files D:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/Motor_Control.bd]

read_vhdl -library xil_defaultlib D:/Xilinx_projects/Motor_Control/Motor_Control.srcs/sources_1/bd/Motor_Control/hdl/Motor_Control_wrapper.vhd
read_xdc D:/Xilinx_projects/Motor_Control/Motor_Control.srcs/constrs_1/new/Motor_Control_Constraints.xdc
set_property used_in_implementation false [get_files D:/Xilinx_projects/Motor_Control/Motor_Control.srcs/constrs_1/new/Motor_Control_Constraints.xdc]

read_xdc dont_touch.xdc
set_property used_in_implementation false [get_files dont_touch.xdc]
synth_design -top Motor_Control_wrapper -part xc7z020clg484-1
write_checkpoint -noxdef Motor_Control_wrapper.dcp
catch { report_utilization -file Motor_Control_wrapper_utilization_synth.rpt -pb Motor_Control_wrapper_utilization_synth.pb }
