<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">

  <!--                                                          -->

  <!--             For tool use only. Do not edit.              -->

  <!--                                                          -->

  <!-- ProjectNavigator created generated project file.         -->

  <!-- For use in tracking generated file and other information -->

  <!-- allowing preservation of process status.                 -->

  <!--                                                          -->

  <!-- Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved. -->

  <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>

  <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="PmodOLED.xise"/>

  <files xmlns="http://www.xilinx.com/XMLSchema">
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="PmodOLEDCtrl.bld"/>
    <file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="PmodOLEDCtrl.cmd_log"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="PmodOLEDCtrl.lso"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="PmodOLEDCtrl.ncd" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="PmodOLEDCtrl.ngc"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="PmodOLEDCtrl.ngd"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="PmodOLEDCtrl.ngr"/>
    <file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="PmodOLEDCtrl.pad"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="PmodOLEDCtrl.par" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="PmodOLEDCtrl.pcf" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="PmodOLEDCtrl.prj"/>
    <file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="PmodOLEDCtrl.ptwx"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="PmodOLEDCtrl.stx"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="PmodOLEDCtrl.syr"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="PmodOLEDCtrl.twr" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="PmodOLEDCtrl.twx" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="PmodOLEDCtrl.unroutes" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="PmodOLEDCtrl.ut" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:fileType="FILE_XPI" xil_pn:name="PmodOLEDCtrl.xpi"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="PmodOLEDCtrl.xst"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="PmodOLEDCtrl_envsettings.html"/>
    <file xil_pn:fileType="FILE_NCD" xil_pn:name="PmodOLEDCtrl_guide.ncd" xil_pn:origination="imported"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="PmodOLEDCtrl_map.map" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="PmodOLEDCtrl_map.mrp" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="PmodOLEDCtrl_map.ncd" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="PmodOLEDCtrl_map.ngm" xil_pn:subbranch="Map"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="PmodOLEDCtrl_map.xrpt"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="PmodOLEDCtrl_ngdbuild.xrpt"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="PmodOLEDCtrl_pad.csv" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="PmodOLEDCtrl_pad.txt" xil_pn:subbranch="Par"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="PmodOLEDCtrl_par.xrpt"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="PmodOLEDCtrl_summary.html"/>
    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="PmodOLEDCtrl_summary.xml"/>
    <file xil_pn:fileType="FILE_WEBTALK" xil_pn:name="PmodOLEDCtrl_usage.xml"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="PmodOLEDCtrl_xst.xrpt"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
    <file xil_pn:fileType="FILE_ASY" xil_pn:name="ipcore_dir/charLib.asy" xil_pn:origination="imported"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="ipcore_dir/charLib.ngc" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="ipcore_dir/charLib.sym" xil_pn:origination="imported"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="ipcore_dir/charLib.vhd" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_VHO" xil_pn:name="ipcore_dir/charLib.vho" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_LOG" xil_pn:name="ipcore_dir/coregen.log"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="pmodoledctrl.bgn" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="pmodoledctrl.bit" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="pmodoledctrl.drc" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="usage_statistics_webtalk.html"/>
    <file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
  </files>

  <transforms xmlns="http://www.xilinx.com/XMLSchema">
    <transform xil_pn:end_ts="1551992915" xil_pn:name="TRANEXT_compLibraries_FPGA" xil_pn:prop_ck="1321705353062746806" xil_pn:start_ts="1551992915">
      <status xil_pn:value="FailedRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1552231869" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1552231869">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1552231869" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="7635212345303013834" xil_pn:start_ts="1552231869">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1553167654" xil_pn:in_ck="3965475853778275676" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-4103921929679804391" xil_pn:start_ts="1553167654">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="ipcore_dir/charLib.ngc"/>
      <outfile xil_pn:name="ipcore_dir/charLib.vhd"/>
    </transform>
    <transform xil_pn:end_ts="1552231870" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1552231870">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1552231870" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="466989698684340300" xil_pn:start_ts="1552231870">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1552231870" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="1106364426758808884" xil_pn:start_ts="1552231870">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1552231870" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="702592249214485411" xil_pn:start_ts="1552231870">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1553169159" xil_pn:in_ck="-2678757257149169749" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-1321563715470813582" xil_pn:start_ts="1553169143">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForOutputs"/>
      <status xil_pn:value="OutputChanged"/>
      <outfile xil_pn:name="PmodOLEDCtrl.lso"/>
      <outfile xil_pn:name="PmodOLEDCtrl.ngc"/>
      <outfile xil_pn:name="PmodOLEDCtrl.ngr"/>
      <outfile xil_pn:name="PmodOLEDCtrl.prj"/>
      <outfile xil_pn:name="PmodOLEDCtrl.stx"/>
      <outfile xil_pn:name="PmodOLEDCtrl.syr"/>
      <outfile xil_pn:name="PmodOLEDCtrl.xst"/>
      <outfile xil_pn:name="PmodOLEDCtrl_xst.xrpt"/>
      <outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
      <outfile xil_pn:name="webtalk_pn.xml"/>
      <outfile xil_pn:name="xst"/>
    </transform>
    <transform xil_pn:end_ts="1552231890" xil_pn:in_ck="-5014087926885606363" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-2675423018628416767" xil_pn:start_ts="1552231890">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1553169166" xil_pn:in_ck="-5726163244729505026" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="-308619096695378172" xil_pn:start_ts="1553169159">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="PmodOLEDCtrl.bld"/>
      <outfile xil_pn:name="PmodOLEDCtrl.ngd"/>
      <outfile xil_pn:name="PmodOLEDCtrl_ngdbuild.xrpt"/>
      <outfile xil_pn:name="_ngo"/>
      <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
    </transform>
    <transform xil_pn:end_ts="1553169180" xil_pn:in_ck="-6521718180893652299" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="1463976855095865663" xil_pn:start_ts="1553169166">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForOutputs"/>
      <status xil_pn:value="OutputChanged"/>
      <outfile xil_pn:name="PmodOLEDCtrl.pcf"/>
      <outfile xil_pn:name="PmodOLEDCtrl_map.map"/>
      <outfile xil_pn:name="PmodOLEDCtrl_map.mrp"/>
      <outfile xil_pn:name="PmodOLEDCtrl_map.ncd"/>
      <outfile xil_pn:name="PmodOLEDCtrl_map.ngm"/>
      <outfile xil_pn:name="PmodOLEDCtrl_map.xrpt"/>
      <outfile xil_pn:name="PmodOLEDCtrl_summary.xml"/>
      <outfile xil_pn:name="PmodOLEDCtrl_usage.xml"/>
      <outfile xil_pn:name="_xmsgs/map.xmsgs"/>
    </transform>
    <transform xil_pn:end_ts="1553169198" xil_pn:in_ck="-6163493660430224434" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-1178055513630676559" xil_pn:start_ts="1553169180">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="PmodOLEDCtrl.ncd"/>
      <outfile xil_pn:name="PmodOLEDCtrl.pad"/>
      <outfile xil_pn:name="PmodOLEDCtrl.par"/>
      <outfile xil_pn:name="PmodOLEDCtrl.ptwx"/>
      <outfile xil_pn:name="PmodOLEDCtrl.unroutes"/>
      <outfile xil_pn:name="PmodOLEDCtrl.xpi"/>
      <outfile xil_pn:name="PmodOLEDCtrl_pad.csv"/>
      <outfile xil_pn:name="PmodOLEDCtrl_pad.txt"/>
      <outfile xil_pn:name="PmodOLEDCtrl_par.xrpt"/>
      <outfile xil_pn:name="_xmsgs/par.xmsgs"/>
    </transform>
    <transform xil_pn:end_ts="1553169211" xil_pn:in_ck="-5064628650045026804" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="396117104113915555" xil_pn:start_ts="1553169198">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="PmodOLEDCtrl.ut"/>
      <outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
      <outfile xil_pn:name="pmodoledctrl.bgn"/>
      <outfile xil_pn:name="pmodoledctrl.bit"/>
      <outfile xil_pn:name="pmodoledctrl.drc"/>
      <outfile xil_pn:name="usage_statistics_webtalk.html"/>
      <outfile xil_pn:name="webtalk.log"/>
      <outfile xil_pn:name="webtalk_pn.xml"/>
    </transform>
    <transform xil_pn:end_ts="1553166610" xil_pn:in_ck="5750672417698516118" xil_pn:name="TRAN_configureTargetDevice" xil_pn:prop_ck="8482462020707587906" xil_pn:start_ts="1553166608">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForInputs"/>
      <status xil_pn:value="InputChanged"/>
    </transform>
    <transform xil_pn:end_ts="1552333092" xil_pn:in_ck="-5064628650045026804" xil_pn:name="TRAN_XPower_spartan6" xil_pn:prop_ck="1949643303204221642" xil_pn:start_ts="1552333092">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForInputs"/>
      <status xil_pn:value="InputChanged"/>
    </transform>
    <transform xil_pn:end_ts="1553169198" xil_pn:in_ck="359632397090161201" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416185" xil_pn:start_ts="1553169192">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="PmodOLEDCtrl.twr"/>
      <outfile xil_pn:name="PmodOLEDCtrl.twx"/>
      <outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
    </transform>
  </transforms>

</generated_project>
