function UDP( NQR_frequency, VGA_gain, Ex_pulse_width, Measuring_delay, Repetition_time, Repetition_number)
% close all
% clear all
% clc


% **********************************
% ***  User variable parameters  ***
% **********************************

% NQR_frequency = 28.1;           % NQR frequency with resonant offset (in MHz)
% VGA_gain = -10;                 % Gain of VGA (in dB)
% Ex_pulse_width = 100;           % Width of excitation pulses (in us)
% Measuring_delay = 100;          % Delay between excitation pulse and start measuring (in us)
% Repetition_time = 3;            % Repetition time of excitation pulses (in ms)
% Repetition_number = 100;        % Number of repetition

% AVAILABLE RANGE FOR NQR FREQUENCY:    - min. available value = 1 MHz
%                                       - max. available value = 30 MHz
% AVAILABLE GAIN SETTING:  -10, -7, -4, -1, 2, 5, 8, 11, 14, 17, 20, 23, 26, 29, 32 and 35 dB
% AVAILABLE RANGE FOR PULSE SEQUENCE TIMING:  - timing step (PG resolution) = 10 ns
%                                             - min. available value = 50 ns
%                                             - max. available value = approx. 21,47 s
% AVAILABLE NUMBER OF REPETITION:    - min. available value = 1
%                                    - max. available value = 2730 (8190 address of PG RAM)




%%  DIRECT DIGITAL SYNTHESIZER (DDS)

DDS_clk = 125.000;     % DDS clock reference (in MHz)

DDS_word = ( ( NQR_frequency + 20) * 2^(32)) / DDS_clk;      % DDS frequency tuning word




%%  DIGITALLY CONTROLLED VARIABLE GAIN AMPLIFIER (VGA)

VGA_word = ( VGA_gain + 10) / 3;      % VGA control word




%%  PULSE GENERATOR (PG)

Ex_pulse_time = ( ( Ex_pulse_width * 1E3 - 50) / 10);
Meas_delay_time = ( ( Measuring_delay * 1E3 - 50) / 10);
Repet_time = ( ( Repetition_time * 1E6 - 50) / 10);

PG_data = zeros( 2,1,'uint32');      % pulse sequence to PG RAM




%%  SEND DATA TO FPGA

u = udp( '192.168.1.1', 'RemotePort', 21845, 'LocalPort', 21845); 
u.Timeout = 2000;    % timeout 2000 s (= 33 minutes)
fopen( u)            % start UDP server



% ***********************************
% ***  DDS frequency tuning word  ***
% ***********************************

fwrite( u, DDS_word, 'uint32');            % send DDS tuning word to FPGA



% ***********************************
% ***  DDS frequency tuning word  ***
% ***********************************

fwrite( u, VGA_word, 'uint8');             % send VGA control word to FPGA



% **************************************
% ***  Sequence for Pulse generator  ***
% **************************************

PG_data(1,1) = 0;
PG_data(2,1) = 0;
fwrite( u, PG_data, 'uint32');             % send start condition

for seq=0:1:( Repetition_number-1)
    PG_data( 1,1) = Ex_pulse_time;
    PG_data( 2,1) = 2^31 + 2^29;
    fwrite( u, PG_data, 'uint32');         % send data of excitation pulse and gating power amplifier

    PG_data( 1,1) = Meas_delay_time;
    PG_data( 2,1) = 0; 
    fwrite( u, PG_data, 'uint32');         % send data of measuring delay

    PG_data( 1,1) = Repet_time - Meas_delay_time;
    PG_data( 2,1) = 2^30;
    fwrite( u, PG_data, 'uint32');         % send data of measuring time
end;

PG_data( 1,1) = 2^31;
PG_data( 2,1) = 0;    
fwrite( u, PG_data, 'uint32');              % send end condition




%%  RECEIVE DATA FROM FPGA

fvz = 2;                                % sampling frequency (for plot resolution)
df = fvz/1024;
f = -fvz/2:df:fvz/2-df;

set( u, 'DatagramTerminateMode', 'off');
set( u, 'ByteOrder', 'bigEndian');      % UDP server setting

spectrum_data = zeros(1024,1,'uint32');
Accumulation_number = zeros(64,1,'uint32');


spectrum_data( 513:576) = fread( u, 64, 'uint32');          % receiving magnitude spectrum from FPGA
spectrum_data( 577:640) = fread( u, 64, 'uint32');
spectrum_data( 641:704) = fread( u, 64, 'uint32');
spectrum_data( 705:768) = fread( u, 64, 'uint32');
spectrum_data( 769:832) = fread( u, 64, 'uint32');
spectrum_data( 833:896) = fread( u, 64, 'uint32');
spectrum_data( 897:960) = fread( u, 64, 'uint32');
spectrum_data( 961:1024) = fread( u, 64, 'uint32');
spectrum_data( 1:64) = fread( u, 64, 'uint32');
spectrum_data( 65:128) = fread( u, 64, 'uint32');
spectrum_data( 129:192) = fread( u, 64, 'uint32');
spectrum_data( 193:256) = fread( u, 64, 'uint32');
spectrum_data( 257:320) = fread( u, 64, 'uint32');
spectrum_data( 321:384) = fread( u, 64, 'uint32');
spectrum_data( 385:448) = fread( u, 64, 'uint32');
spectrum_data( 449:512) = fread( u, 64, 'uint32');

Accumulation_number( 1:64) = fread( u, 64, 'uint32');       % receive number of accumulation from FPGA
                                                            % (256 B is transmitter volume of data, so only first uint32 value is useful)

    
figure( 1)                                                  % plot accumulated magnitude spectrum
    plot( f, spectrum_data);
    title( ['\bfKUMULOVANÉ AMPLITUDOVÉ SPEKTRUM MĚŘENÉHO SIGNÁLU FID\rm' char(10)...
            '(Frekvence = \bf', num2str( NQR_frequency), ' MHz\rm, zesílení = \bf', num2str( VGA_gain),...
            ' dB\rm, šířka pulsu = \bf', num2str( Ex_pulse_width), ' \mus\rm, mrtvá doba = \bf', num2str( Measuring_delay),...
            ' \mus\rm, opakovací perioda = \bf', num2str( Repetition_time), ' ms\rm, počet opakování = \bf', num2str( Repetition_number),...
            '\rm, počet akumulací = \bf', num2str( Accumulation_number(1)), '\rm)' char(10)]);
    xlabel(['f (MHz)']);
    ylabel(['|S(f)|']);
    


fclose( u)            % stop UDP server
delete( u);
clear u
