#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>

#include <linux/fs.h>

#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/mutex.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/arch/ssp.h>
#include <asm/arch/pxa-regs.h>

#define PXA_SSP_PORTS 	3

#define TIMEOUT 100000

#define DEV_NAME "MODUL"
#define MODUL "MODUL"

static char __initdata hello[] = KERN_NOTICE MODUL ": Nazdar\n";
static char __exitdata bye[] = KERN_NOTICE MODUL ": Sbohem\n";
static int MOD_MAJOR = 0;






struct ssp_info_ {
	int irq;
	u32 clock;
};

/*
 * SSP port clock and IRQ settings
 */
static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = {
#if defined (CONFIG_PXA27x)
	{IRQ_SSP,	CKEN23_SSP1},
	{IRQ_SSP2,	CKEN3_SSP2},
	{IRQ_SSP3,	CKEN4_SSP3},
#else
	{IRQ_SSP,	CKEN3_SSP},
	{IRQ_NSSP,	CKEN9_NSSP},
	{IRQ_ASSP,	CKEN10_ASSP},
#endif
};

static DEFINE_MUTEX(mutex);
static int use_count[PXA_SSP_PORTS] = {0, 0, 0};

static irqreturn_t ssp_interrupt(int irq, void *dev_id)
{
	struct ssp_dev *dev = (struct ssp_dev*) dev_id;
	unsigned int status = SSSR_P(dev->port);

	SSSR_P(dev->port) = status; /* clear status bits */

	if (status & SSSR_ROR)
		printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port);

	if (status & SSSR_TUR)
		printk(KERN_WARNING "SSP(%d): transmitter underrun\n", dev->port);

	if (status & SSSR_BCE)
		printk(KERN_WARNING "SSP(%d): bit count error\n", dev->port);

	return IRQ_HANDLED;
}


/**
 * ssp_write_word - write a word to the SSP port
 * @data: 32-bit, MSB justified data to write.
 *
 * Wait for a free entry in the SSP transmit FIFO, and write a data
 * word to the SSP port.
 *
 * The caller is expected to perform the necessary locking.
 *
 * Returns:
 *   %-ETIMEDOUT	timeout occurred
 *   0			success
 */
int ssp_write_word(struct ssp_dev *dev, u32 data)
{
	int timeout = TIMEOUT;

	printk( KERN_INFO DEV_NAME ": posilam data\n");

	timeout = TIMEOUT;
	
	while (!(SSSR_P(dev->port) & SSSR_TNF)) {
	        if (!--timeout){
	        	return -ETIMEDOUT;
		}
		cpu_relax();
	}

	SSDR_P(dev->port) = data;

	return 0;
}

/**
 * ssp_read_word - read a word from the SSP port
 *
 * Wait for a data word in the SSP receive FIFO, and return the
 * received data.  Data is LSB justified.
 *
 * Note: Currently, if data is not expected to be received, this
 * function will wait for ever.
 *
 * The caller is expected to perform the necessary locking.
 *
 * Returns:
 *   %-ETIMEDOUT	timeout occurred
 *   32-bit data	success
 */
int ssp_read_word(struct ssp_dev *dev, u32 *data)
{
	int timeout = TIMEOUT;
	timeout = TIMEOUT;
	while( !(SSSR_P( dev->port) & SSSR_RNE)) {
	    if( ! --timeout)
		return -ETIMEDOUT;
	    cpu_relax();
	}
	*data = SSDR_P(dev->port);

	return 0;
}

/**
 * ssp_flush - flush the transmit and receive FIFOs
 *
 * Wait for the SSP to idle, and ensure that the receive FIFO
 * is empty.
 *
 * The caller is expected to perform the necessary locking.
 */
int ssp_flush(struct ssp_dev *dev)
{
	int timeout = TIMEOUT * 2;

	do {
		while (SSSR_P(dev->port) & SSSR_RNE) {
		        if (!--timeout)
		        	return -ETIMEDOUT;
			(void) SSDR_P(dev->port);
		}
	        if (!--timeout)
	        	return -ETIMEDOUT;
	} while (SSSR_P(dev->port) & SSSR_BSY);

	return 0;
}

/**
 * ssp_enable - enable the SSP port
 *
 * Turn on the SSP port.
 */
void ssp_enable(struct ssp_dev *dev)
{
	SSCR0_P(dev->port) |= SSCR0_SSE;
}

/**
 * ssp_disable - shut down the SSP port
 *
 * Turn off the SSP port, optionally powering it down.
 */
void ssp_disable(struct ssp_dev *dev)
{
	SSCR0_P(dev->port) &= ~SSCR0_SSE;
}

/**
 * ssp_save_state - save the SSP configuration
 * @ssp: pointer to structure to save SSP configuration
 *
 * Save the configured SSP state for suspend.
 */
void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp)
{
	ssp->cr0 = SSCR0_P(dev->port);
	ssp->cr1 = SSCR1_P(dev->port);
	ssp->to = SSTO_P(dev->port);
	ssp->psp = SSPSP_P(dev->port);

	SSCR0_P(dev->port) &= ~SSCR0_SSE;
}

/**
 * ssp_restore_state - restore a previously saved SSP configuration
 * @ssp: pointer to configuration saved by ssp_save_state
 *
 * Restore the SSP configuration saved previously by ssp_save_state.
 */
void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp)
{
	SSSR_P(dev->port) = SSSR_ROR | SSSR_TUR | SSSR_BCE;

	SSCR0_P(dev->port) = ssp->cr0 & ~SSCR0_SSE;
	SSCR1_P(dev->port) = ssp->cr1;
	SSTO_P(dev->port) = ssp->to;
	SSPSP_P(dev->port) = ssp->psp;

	SSCR0_P(dev->port) = ssp->cr0;
}

/**
 * ssp_config - configure SSP port settings
 * @mode: port operating mode
 * @flags: port config flags
 * @psp_flags: port PSP config flags
 * @speed: port speed
 *
 * Port MUST be disabled by ssp_disable before making any config changes.
 */
int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed)
{
	dev->mode = mode;
	dev->flags = flags;
	dev->psp_flags = psp_flags;
	dev->speed = speed;

	/* set up port type, speed, port settings */
	SSCR0_P(dev->port) = (dev->speed | dev->mode);
	SSCR1_P(dev->port) = dev->flags;
	SSPSP_P(dev->port) = dev->psp_flags;

	return 0;
}

/**
 * ssp_init - setup the SSP port
 *
 * initialise and claim resources for the SSP port.
 *
 * Returns:
 *   %-ENODEV	if the SSP port is unavailable
 *   %-EBUSY	if the resources are already in use
 *   %0		on success
 */
int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
{
	int ret;

	if (port > PXA_SSP_PORTS || port == 0)
		return -ENODEV;

	mutex_lock(&mutex);
	if (use_count[port - 1]) {
		mutex_unlock(&mutex);
		return -EBUSY;
	}
	use_count[port - 1]++;

	if (!request_mem_region(__PREG(SSCR0_P(port)), 0x2c, "SSP")) {
		use_count[port - 1]--;
		mutex_unlock(&mutex);
		return -EBUSY;
	}
	dev->port = port;

	/* do we need to get irq */
	if (!(init_flags & SSP_NO_IRQ)) {
		ret = request_irq(ssp_info[port-1].irq, ssp_interrupt,
				0, "SSP", dev);
	    	if (ret)
			goto out_region;
	    	dev->irq = ssp_info[port-1].irq;
	} else
		dev->irq = 0;

	/* turn on SSP port clock */
	pxa_set_cken(ssp_info[port-1].clock, 1);
	mutex_unlock(&mutex);
	return 0;

out_region:
	release_mem_region(__PREG(SSCR0_P(port)), 0x2c);
	use_count[port - 1]--;
	mutex_unlock(&mutex);
	return ret;
}

/**
 * ssp_exit - undo the effects of ssp_init
 *
 * release and free resources for the SSP port.
 */
void ssp_exit(struct ssp_dev *dev)
{
	mutex_lock(&mutex);
	SSCR0_P(dev->port) &= ~SSCR0_SSE;

    	if (dev->port > PXA_SSP_PORTS || dev->port == 0) {
		printk(KERN_WARNING "SSP: tried to close invalid port\n");
		return;
	}

	pxa_set_cken(ssp_info[dev->port-1].clock, 0);
	if (dev->irq)
		free_irq(dev->irq, dev);
	release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c);
	use_count[dev->port - 1]--;
	mutex_unlock(&mutex);
}

EXPORT_SYMBOL(ssp_write_word);
EXPORT_SYMBOL(ssp_read_word);
EXPORT_SYMBOL(ssp_flush);
EXPORT_SYMBOL(ssp_enable);
EXPORT_SYMBOL(ssp_disable);
EXPORT_SYMBOL(ssp_save_state);
EXPORT_SYMBOL(ssp_restore_state);
EXPORT_SYMBOL(ssp_init);
EXPORT_SYMBOL(ssp_exit);
EXPORT_SYMBOL(ssp_config);



static int spi_major = 0;

static struct ssp_dev ssp1_dev = {
    .port	= 1,
    .mode 	= 0,
    .flags	= 0,
    .psp_flags	= 0,
    .speed	= 200000,
    .irq	= IRQ_SSP,
};




static int spi_reset( struct ssp_dev *dev)
{
    int res;
    struct ssp_state ssp_old;
    
    ssp_disable( dev);
    ssp_save_state( dev, &ssp_old);
    
    /* POKUSNE OTEVRENI A KONFIGURACE PRO PRENOS */
    res = ssp_config( &ssp1_dev, 
	//SSCR0_MOD | 					// network mode
	//    ( SSCR0_FRDC & SSCR0_SlotsPerFrm(1)) | 	// slots per frame
	    SSCR0_TUM | 				// transmit fifo underrun do not generate interrupt			
	    SSCR0_RIM | 				// receive fifo overrun do not generate interrupt
	    //SSCR0_EDSS |				// extended data size select
	    SSCR0_PSP | 				// programmable serial port
	    (SSCR0_DSS & SSCR0_DataSize( 16)), 		// data size
	SSCR1_SCFR |
	  SSCR1_SPO |
	  SSCR1_SPH |
	  (SSCR1_RFT & SSCR1_RxTresh( 2)) |
	  (SSCR1_TFT & SSCR1_TxTresh( 2)), 
	//SSPSP_FSRT |
	  SSPSP_SCMODE( 3) |
	  SSPSP_STRTDLY( 2) |
	  SSPSP_DMYSTRT( 0) |
	  SSPSP_DMYSTOP( 0) |
	  SSPSP_SFRMWDTH( 13) |
	  SSPSP_SFRMDLY( 2),
	SSCR0_SCR & SSCR0_SerClkDiv(60));
    if( res < 0) {
	printk( KERN_ERR DEV_NAME ": konfigurace portu se nezdarila\n");
	return res;
    }
    
    ssp_enable( dev);
    ssp_write_word( dev, 0x6000);
    ssp_write_word( dev, 0x6000);
    ssp_flush( dev);
    
    ssp_disable( dev);
    
    ssp_restore_state( dev, &ssp_old);
    ssp_enable( dev);
    
    return( 0);
}










static int modul_open( struct inode *inode, struct file *filp)
{
    unsigned int minor = 255;
    
    minor = iminor( inode);
    
    printk( "MOD: open minor %d\n", minor);
    
    printk( "MOD: open\n");
    return 0;
}

static int modul_release( struct inode *inode, struct file *filp)
{
    unsigned int minor = 255;
    
    minor = iminor( inode);
    
    printk( "MOD: release minor %d\n", minor);

    printk( "MOD: release\n");
    return 0;
}

static ssize_t modul_read( struct file *flip, char *buff, size_t count, loff_t *offp)
{
    unsigned int minor = 255;
    int control = 0;
    char bytes=1;
    int i;
    int data;
    size_t act_count=count;
    
    minor = iminor( flip->f_dentry->d_inode); //zjisteni minor cisla
    
    control |= 1<<6; //nastaveni 6. bitu ve slove control na 1 -> cteni
    
    if( !(minor & 0x01)) { //2. bit v minoru==1 => pristup k registrum
	control |= 1<<5; //reg
    } else { //ram
	bytes=2;
	if(count%2==1) { //z pameti se cte vzdy sudy pocet bytu
	    act_count--;
	    printk ("MOD: odd byte count\n");
	}
    }
    
    
    control = (minor>>4) | control; //nasteveni pristupu k modulu podle minor cisla
    control = control << 8;
    printk( "MOD: control 0x%x\n", control);
    if(bytes==1) { //cteni z registru -> 1 byte
	printk( "MOD: read REG\n");
	for(i=0;i<act_count;i++) {
	    control &= 0xff00; //vynulovani adresoveho bytu
    	    control |= (*offp & 0x00ff); //nastaveni adresoveho bytu
	    (*offp)++; //posun
	    //send control
            ssp_write_word( &ssp1_dev, control); //odeslani slova control
            ssp_write_word( &ssp1_dev, 0x6000); //a neskodneho slova
	    printk( "MOD: control 0x%x\n", control);
	    //read data
            ssp_read_word( &ssp1_dev, &data);
            ssp_read_word( &ssp1_dev, &data);
	    *(buff+i)=(data & 0x00ff); //prenos do cteciho bufferu 
	    printk( "MOD: data 0x%x\n", data);
	}
    } else {
	printk( "MOD: read RAM\n");
	for(i=0;i<act_count;i++,i++) {
	    control &= 0xff00;	
    	    control |= (((*offp)/2) & 0x00ff); //pamet se cte po 2 bytech
	    (*offp)++;
	    (*offp)++;
	    //send control
	    printk( "MOD: control 0x%x\n", control);
            ssp_write_word( &ssp1_dev, control);
            ssp_write_word( &ssp1_dev, 0x6000);
	    //read data
            ssp_read_word( &ssp1_dev, &data);
            ssp_read_word( &ssp1_dev, &data);
	    *(buff+i)=(data & 0xff00)>>8; //prenos prvniho bytu
	    *(buff+i+1)=(data & 0x00ff); //prenos druheho bytu
	    printk( "MOD: data 0x%x\n", data);
	}
    }
    return act_count;
}

static ssize_t modul_write( struct file *flip, const char *buff, size_t count, loff_t *offp)
{
    unsigned int minor = 255;
    minor = iminor( flip->f_dentry->d_inode);
    int data=0;
    int control=0;

    char bytes=1;
    int i;
    size_t act_count=count;
    
    if( !(minor & 0x01)) {
	control |= 1<<5; //reg
    } else { //ram
	bytes=2;
	if(count%2==1) {
	    act_count--;
	    printk ("MOD: odd byte count\n");
	}
    }
    control = (minor>>4) | control;
    control = control << 8;
    printk( "MOD: control 0x%x\n", control);
    if(bytes==1) {
	printk( "MOD: write REG\n");
	for(i=0;i<act_count;i++) {
	    control &= 0xff00;
    	    control |= (*offp & 0x00ff);
	    data=*(buff+i)<<8;
	    (*offp)++;
	    //send control
            ssp_write_word( &ssp1_dev, control);
            ssp_write_word( &ssp1_dev, data);
	    printk( "MOD: control 0x%x\n", control);
	    printk( "MOD: data 0x%x\n", data);
            ssp_read_word( &ssp1_dev, &data);
            ssp_read_word( &ssp1_dev, &data);
	    //send data
	}
    } else {
	printk( "MOD: write RAM\n");
	for(i=0;i<act_count;i++,i++) {
	    control &= 0xff00;	
    	    control |= (((*offp)/2) & 0x00ff);
	    data=*(buff+i); //prvni byte dat k zapisu
	    data=data<<8;
	    data|=*(buff+i+1); //druhy byte
	    (*offp)++;
	    (*offp)++;
	    //send control
            ssp_write_word( &ssp1_dev, control);
            ssp_write_word( &ssp1_dev, data);
	    printk( "MOD: control 0x%x\n", control);
	    printk( "MOD: data 0x%x\n", data);
            ssp_read_word( &ssp1_dev, &data); //pri zapisu se zaroven cte->je treba 2 slova zahodit
            ssp_read_word( &ssp1_dev, &data);
	    //send data
	}
    }
    return act_count;
}

loff_t modul_llseek(struct file* filp, loff_t off,int whence){

    loff_t newpos;
    unsigned int minor = 255;
    minor = iminor( filp->f_dentry->d_inode);
    
    if( !(minor & 0x01)) { //regs
	printk("MOD: llseek REG off %d\n", off);
	switch(whence){
	    case 0: //SEEK_SET
		newpos=off;
		break;
	    case 1://SEEK_CUR
		newpos=filp->f_pos+off;
		break;
	    case 2://SEEK_END
		newpos=255; //registru je 256
		break;
	    default:
		return -EINVAL;
	}	
	if(newpos<0)
	    return -EINVAL;
	filp->f_pos=newpos;

	return newpos;
    } else { //ram
	printk("MOD: llseek RAM off %d\n", off);
	switch(whence){
	    case 0: //SEEK_SET
		newpos=off*2;
		break;
	    case 1://SEEK_CUR
		newpos=filp->f_pos+off*2;
		break;
	    case 2://SEEK_END
		newpos=511; //RAM ma 512 bytu
		break;
	    default:
		return -EINVAL;
	}	
	if(newpos<0)
	    return -EINVAL;
	filp->f_pos=newpos;

	return newpos;
    }
    
}

static struct file_operations modul_fops = {
    read: modul_read,
    write: modul_write,
    open: modul_open,
    release: modul_release,
    llseek: modul_llseek,
};



static int __init start( void)
{
    int res;
    printk( hello);

	
    res = register_chrdev( MOD_MAJOR, DEV_NAME, &modul_fops);
    if( res < 0){
	printk( "MOD: registrace se nezdarila\n");
	return res;
    }
    MOD_MAJOR = res;


    /* enable SSP */
    pxa_gpio_mode( GPIO23_SCLK_MD | GPIO_IN);
    pxa_gpio_mode( GPIO24_SFRM_MD | GPIO_IN);
    pxa_gpio_mode( GPIO25_STXD_MD | GPIO_OUT);
    pxa_gpio_mode( GPIO26_SRXD_MD | GPIO_IN);
    

//    GPDR0 = GPDR0     & 0xF87FFFFF;
//    GPDR0 = GPDR0     | 0x03800000;
//    GAFR0_U = GAFR0_U & 0xFFC03FFF;
//    GAFR0_U = GAFR0_U | 0x001A8000;

    printk( KERN_INFO DEV_NAME ": SSCR0 = %x\n", SSCR0_P(ssp1_dev.port));
    printk( KERN_INFO DEV_NAME ": SSCR1 = %x\n", SSCR1_P(ssp1_dev.port));
    printk( KERN_INFO DEV_NAME ": SSPSP = %x\n", SSPSP_P(ssp1_dev.port));
    printk( KERN_INFO DEV_NAME ": GPDR0 = %x\n", GPDR0);
    printk( KERN_INFO DEV_NAME ": GAFR0_U = %x\n", GAFR0_U);

    /* POKUSNE OTEVRENI A KONFIGURACE PRO RESET  */
    res = ssp_init( &ssp1_dev, 1, 0);
    if( res < 0) {
	printk( KERN_ERR DEV_NAME ": inicializace portu se nezdarila\n");
	return res;
    }
    
    /* POKUSNE OTEVRENI A KONFIGURACE PRO PRENOS */
    res = ssp_config( &ssp1_dev, 
	//SSCR0_MOD | 					// network mode
	//    ( SSCR0_FRDC & SSCR0_SlotsPerFrm(1)) | 	// slots per frame
	    SSCR0_TUM | 				// transmit fifo underrun do not generate interrupt			
	    SSCR0_RIM | 				// receive fifo overrun do not generate interrupt
	    //SSCR0_EDSS |				// extended data size select
	    SSCR0_PSP | 				// programmable serial port
	    (SSCR0_DSS & SSCR0_DataSize( 16)), 		// data size
	SSCR1_SCFR |
	  SSCR1_SPO |
	  SSCR1_SPH |
	  (SSCR1_RFT & SSCR1_RxTresh( 2)) |
	  (SSCR1_TFT & SSCR1_TxTresh( 2)), 
	//SSPSP_FSRT |
	  SSPSP_SCMODE( 3) |
	  SSPSP_STRTDLY( 2) |
	  SSPSP_DMYSTRT( 0) |
	  SSPSP_DMYSTOP( 0) |
	  SSPSP_SFRMWDTH( 17) |
	  SSPSP_SFRMDLY( 2),
	SSCR0_SCR & SSCR0_SerClkDiv(60));
    if( res < 0) {
	printk( KERN_ERR DEV_NAME ": konfigurace portu se nezdarila\n");
	return res;
    }

    spi_reset( &ssp1_dev);
    
    ssp_enable( &ssp1_dev);




    return 0;
}


static void __exit go_away( void)
{
    ssp_disable( &ssp1_dev);
    ssp_exit( &ssp1_dev);
    
    unregister_chrdev( MOD_MAJOR, DEV_NAME);

    printk( bye);
}

module_init( start);
module_exit( go_away);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("zkusebni modul");
MODULE_AUTHOR("SvehlikM");